IP Library › Granted Patent US 9,547,576
Granted Patent B2
US 9,547,576 · App. 14/151,421 · Granted Jan 17, 2017

Multi-core processor system and control method

Inventors: Hiromasa Yamauchi (Usakos, NA); Koichiro Yamashita (Hachioji, JP); Takahisa Suzuki (Yokohama, JP); Koji Kurihara (Kawasaki, JP); Toshiya Otomo (Kawasaki, JP)
Assignee: FUJITSU LIMITED
G06F11/3409G06F9/505G06F2209/501G06F2209/5021
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,547,576
App. No.
14/151,421
Granted
Jan 17, 2017
Kind
B2
Abstract

A multi-core processor system includes a multi-core processor that has plural core groups; and a storage device that stores a constraint on execution time for each application. A first identified core of the multi-core processor is configured to identify a constraint on execution time of a given application that is among the applications and for which an invocation instruction is received; determine whether the identified constraint meets a performance drop condition; assign the given application to a predetermined core of the multi-core processor, upon determining that the identified constraint meets the performance drop condition; and notify a second identified core of a core group among the core groups, of an assignment instruction for the given application, upon determining that the identified constraint does not meet the performance drop condition.

Claims (24)

1. A multi-core processor system comprising:

a multi-core processor that has a plurality of core groups; and

a storage device that stores a plurality of applications, the multi-core processor is configured to:

determine, whether an application invocation has been received, wherein a receiving unit of a general master processor determines whether the application invocation has been received when a particular application of plurality of applications is stacked in a wait queue;

in response to determining that the application invocation has been received, determine whether the particular application that sent the application invocation has a strong real-time constraint, wherein a determining unit of the general master processor determines whether the particular application has strong real-time constraint based on a flag associated with the particular application in a table;

in response to the particular application having strong real-time constraint, assign the particular application to a particular core of the plurality of core groups, wherein an assignment unit of the general master processor assigns the particular application based on identification information in a dispatch destination store;

otherwise, identify by the general master processor, a group of cores whose total load is the lowest;

assign the particular application to the identified group of cores; and

notify the identified group of cores of the assignment.

2. The multi-core processor system according to claim 1 , wherein the general master processor is configured to decide the particular core based on whether each core of the multi-core processor is executing an application.

3. The multi-core processor system according to claim 2 , wherein the storage device stores for each core of the multi-core processor, an assignment time of an application currently under execution at the core, and another core of the core group is configured to:

update in the storage device and after assigning the particular application, the assignment time of the core.

4. The multi-core processor system according to claim 3 , wherein the the general master processor decides the particular core based on the assignment time after another core updates the running application load for the particular core.

5. The multi-core processor system according to claim 1 , wherein the particular core is configured to notify a second identified core of the core group to which the particular core belongs, of a migration instruction to migrate a running application, other than the particular application, at the predetermined core to another core of the core group to which the particular core belongs, upon receiving an assignment of the particular application, and

the second identified core of the core group to which the particular core belongs is configured to execute a migration process to migrate the running application at the particular core to another core of the core group to which the particular core belongs.

6. The multi-core processor system according to claim 1 , comprising a shared resource that is shared among the multi-core processor, wherein the particular core is configured to set upon receiving an assignment of the particular application from the general master processor, a rate of access of the shared resource by the particular core to be higher than before receiving the assignment of the particular application.

7. The multi-core processor system according to claim 1 , comprising a cache shared by a core group to which the particular core belongs, wherein another core of the core group to which the particular core belongs is configured to refrain from accessing the cache when the given application is assigned to the particular core by the general master processor.

8. A control method of a multi-core processor that has a plurality of core groups for assigning plurality of applications, the control method comprising;

determining, whether an application invocation has been received, wherein a receiving unit of a general master processor determines whether the application invocation has been received when a particular application is stacked in a wait queue;

in response to determining that the application invocation has been received, determining whether the particular application that sent the application invocation has a strong real-time constraint, wherein a determining unit of the general master processor determines whether the particular application has strong real-time constraint based on a flag associated with the application in a table;

in response to the particular application having strong real-time constraint, assigning the particular application to a particular core of the plurality of core groups, wherein an assignment unit of the general master processor assigns the particular application based on identification information in a dispatch destination store;

otherwise, identifying by the general master processor, a group of cores whose total load is the lowest;

assigning the application to the identified group of cores; and

notifying the identified group of cores of the assignment.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 5, 2016
From: YAMAUCHI, HIROMASA; YAMASHITA, KOICHIRO; SUZUKI, TAKAHISA; KURIHARA, KOJI; OTOMO, TOSHIYA
To: FUJITSU LIMITED
Reel/Frame 040816/0874 →
Continuity (2)
Continuation PCTJP2011066011 · Jul 13, 2011
Related Publication 20140129811A1 · May 8, 2014