IP Library › Granted Patent US 9,552,850
Granted Patent B2
US 9,552,850 · App. 14/886,334 · Granted Jan 24, 2017

Sense amplifier driving device and semiconductor device including the same

Inventor: Young Geun Choi (Suwon-si, KR)
Assignee: SK HYNIX INC.
G11C7/062G11C7/08G11C7/12
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Quick Facts
Patent No.
US 9,552,850
App. No.
14/886,334
Granted
Jan 24, 2017
Kind
B2
Abstract

An embodiment relates to a sense amplifier driving device for stabilizing bit line precharge power when a post-overdriving operation is performed. The sense amplifier driving device includes a power driving unit configured to supply a first pull-up voltage and a pull-down voltage to a pull-up power line and a pull-down power line during a post-overdriving period and a driving signal generation unit configured to generate a pull-up driving signal and a pull-down driving signal activated during the post-overdriving period in order to control the driving of the power driving unit. The driving signal generation unit controls a point of time at which the pull-down driving signal shifts in response to a post-overdriving enable signal.

Claims (46)

1. A sense amplifier driving device, comprising:

a power driving unit configured to supply a first pull-up voltage and a pull-down voltage to a pull-up power line and a pull-down power line during a post-overdriving period; and

a driving signal generation unit configured to generate a pull-up driving signal and a pull-down driving signal activated during the post-overdriving period in order to control a driving of the power driving unit, wherein the driving signal generation unit controls a point of time at which the pull-down driving signal shifts in response to a post-overdriving enable signal,

wherein the driving signal generation unit comprises:

a control signal generation unit configured to perform pull-up or pull-down driving on a pull-down pre-signal in response to an active signal and a precharge signal;

a delay unit configured to delay the pull-down pre-signal;

a selection unit configured to select one of the pull-down pre-signal and an output of the delay unit in response to the post-overdriving enable signal; and

a driving unit configured to output the pull-down driving signal by driving the output of the selection unit.

2. The sense amplifier driving device of claim 1 , wherein the post-overdriving period is a certain period of time before a word line of a memory cell is disabled prior to a precharge period.

3. The sense amplifier driving device of claim 1 , wherein the first pull-up voltage comprises a power supply voltage.

4. The sense amplifier driving device of claim 1 , wherein the pull-down voltage comprises a ground voltage.

5. The sense amplifier driving device of claim 1 , wherein the power driving unit supplies, during an active period, the pull-up power line with a second pull-up voltage lower than the first pull-up voltage.

6. The sense amplifier driving device of claim 5 , wherein the second pull-up voltage comprises a core voltage.

7. The sense amplifier driving device of claim 1 , wherein the power driving unit comprises:

a first pull-up driving unit configured to generate the first pull-up voltage when a first pull-up driving signal is activated in an overdriving period and the post-overdriving period;

a second pull-up driving unit configured to supply the pull-up power line with a second pull-up voltage lower than the first pull-up voltage when a second pull-up driving signal is activated in the active period; and

a pull-down driving unit configured to supply the pull-down voltage when the pull-down driving signal is activated in the overdriving period and the post-overdriving period.

8. The sense amplifier driving device of claim 1 , wherein the delay unit delays a falling edge of the pull-down pre-signal in a precharge period.

9. The sense amplifier driving device of claim 1 , wherein the selection unit selects the output of the delay unit when the post-overdriving enable signal is activated and selects the pull-down pre-signal when the post-overdriving enable signal is deactivated.

10. The sense amplifier driving device of claim 1 , wherein the driving signal generation unit is configured to:

delay a falling edge of a pull-down control signal during a delay time of the delay unit when the post-overdriving enable signal is activated, and

deactivate the pull-down control signal in response to the pull-down pre-signal when the post-overdriving enable signal is deactivated in the precharge period.

11. A semiconductor device, comprising:

a sense amplifier configured to sense and amplify data of a memory cell in response to a voltage applied to a pull-up power line and a pull-down power line; and

a sense amplifier driving device configured to supply a first pull-up voltage and a pull-down voltage to the pull-up power line and the pull-down power line during a post-overdriving period, generate a pull-up driving signal and a pull-down driving signal for controlling the first pull-up voltage and the pull-down voltage, and control a point of time at which the pull-down driving signal shifts in response to a post-overdriving enable signal,

wherein the driving signal generation unit comprises:

a control signal generation unit configured to perform pull-up or pull-down driving on a pull-down pre-signal in response to an active signal and a precharge signal;

a delay unit configured to delay the pull-down pre-signal;

a selection unit configured to select one of the pull-down pre-signal and output of the delay unit in response to the post-overdriving enable signal; and

a driving unit configured to output the pull-down driving signal by driving the output of the selection unit.

12. The semiconductor device of claim 11 , wherein the post-overdriving period is a certain period of before a word line of a memory cell is disabled prior to a precharge period.

13. The semiconductor device of claim 11 , wherein the sense amplifier driving device comprises:

a power driving unit configured to supply the first pull-up voltage and the pull-down voltage to the pull-up power line and the pull-down power line during the post-overdriving period; and

a driving signal generation unit configured to generate the first pull-up driving signal and the pull-down driving signal in order to control a driving of the power driving unit and control the point of time at which the pull-down driving signal shifts in response to the post-overdriving enable signal.

14. The semiconductor device of claim 13 , wherein the power driving unit comprises:

a first pull-up driving unit configured to generate the first pull-up voltage when a first pull-up driving signal is activated in an overdriving period and the post-overdriving period;

a second pull-up driving unit configured to supply the pull-up power line with a second pull-up voltage lower than the first pull-up voltage when a second pull-up driving signal is activated in the active period; and

a pull-down driving unit configured to supply the pull-down voltage when the pull-down driving signal is activated in the overdriving period and the post-overdriving period.

15. The semiconductor device of claim 11 , wherein the delay unit delays a falling edge of the pull-down pre-signal in a precharge period.

16. The semiconductor device of claim 11 , wherein the selection unit selects the output of the delay unit when the post-overdriving enable signal is activated and selects the pull-down pre-signal when the post-overdriving enable signal is deactivated.

17. The semiconductor device of claim 11 , wherein the driving signal generation unit is configured to:

delay a falling edge of a pull-down control signal during a delay time of the delay unit when the post-overdriving enable signal is activated, and

deactivate the pull-down control signal in response to the pull-down pre-signal when the post-overdriving enable signal is deactivated in the precharge period.

18. The semiconductor device of claim 11 , wherein:

the first pull-up voltage comprises a power supply voltage, and

the pull-down voltage comprises a ground voltage.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2015
From: CHOI, YOUNG GEUN
To: SK HYNIX INC.
Reel/Frame 036887/0384 →
Priority Claims (1)
KR 10-2015-0085295 · Jun 16, 2015 · national
Continuity (1)
Related Publication 20160372162A1 · Dec 22, 2016