IP Library Granted Patent US 9,553,598
Granted Patent B2
US 9,553,598 · App. 14/850,472 · Granted Jan 24, 2017

Analog-to-digital converter and semiconductor integrated circuit

Inventor: Takeshi Nozaki (Sagamihara, JP)
Assignee: SOCIONEXT INC.
H03M1/0604H03M1/0836H03M1/1215
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Quick Facts
Patent No.
US 9,553,598
App. No.
14/850,472
Granted
Jan 24, 2017
Kind
B2
Abstract

A time-interleaved analog-to-digital converter that samples an analog input signal at a sampling frequency and converts the analog input signal into a digital output signal is enabled to perform correction processing on an error by: converting the analog input signal into the digital output signal by a plurality of analog-to-digital conversion circuits in a time-interleaved manner; and performing gain correction processing and skew correction processing with respect to the analog-to-digital conversion circuit, on the basis of a mixed signal, the mixed signal being obtained by mixing an output signal from the analog-to-digital conversion circuit with a signal made by shifting a phase of the output signal by π/2.

Claims (51)

1. An analog-to-digital converter configured to sample an analog input signal at a sampling frequency and to convert the analog input signal into a digital output signal, the analog-to-digital converter comprising:

a plurality of analog-to-digital conversion circuits configured to convert the analog input signal into the digital output signal in a time-interleaved manner; and

a correction circuit configured to perform gain correction processing with respect to the analog-to-digital conversion circuit, on the basis of a mixed signal, the mixed signal being obtained by mixing an output signal from the analog-to-digital conversion circuit with a signal made by shifting a phase of the output signal by π/2,

wherein the correction circuit includes a gain correction circuit configured to detect a gain correction value on the basis of the mixed signal, and to perform correction processing on a gain error between the plurality of analog-to-digital conversion circuits, on the basis of the gain correction value.

2. The analog-to-digital converter according to claim 1 , wherein

the correction circuit includes:

a signal generation circuit configured to generate the mixed signal.

3. The analog-to-digital converter according to claim 2 , wherein

the gain correction circuit performs the correction processing on the gain error by multiplying the output signal from at least one of the plurality of analog-to-digital conversion circuits by the gain correction value.

4. The analog-to-digital converter according to claim 2 , wherein

the correction circuit configured to perform the gain correction processing and skew correction processing with respect to the analog-to-digital conversion circuit on the basis of the mixed signal, and

the correction circuit further includes a skew correction circuit configured to detect a skew correction value on the basis of the mixed signal generated by the signal generation circuit, and to perform correction processing on a skew between the plurality of analog-to-digital conversion circuits, on the basis of the skew correction value.

5. The analog-to-digital converter according to claim 4 , wherein

the skew correction circuit performs the correction processing on the skew by shifting a phase of the output signal from at least one of the plurality of analog-to-digital conversion circuits in accordance with the skew correction value.

6. The analog-to-digital converter according to claim 1 , wherein

the gain correction circuit is further configured to generate the mixed signal.

7. The analog-to-digital converter according to claim 6 , wherein

the gain correction circuit performs the correction processing on the gain error by multiplying the output signal from at least one of the plurality of analog-to-digital conversion circuits by the gain correction value.

8. A semiconductor integrated circuit, comprising:

an analog-to-digital converter configured to sample an analog input signal at a sampling frequency and to convert the analog input signal into a digital output signal; and

a processing circuit configured to perform signal processing on the digital output signal, wherein

the analog-to-digital converter includes:

a plurality of analog-to-digital conversion circuits configured to convert the analog input signal into the digital output signal in a time-interleaved manner; and

a correction circuit configured to perform gain correction processing with respect to the analog-to-digital conversion circuit, on the basis of a mixed signal, the mixed signal being obtained by mixing an output signal from the analog-to-digital conversion circuit with a signal made by shifting a phase of the output signal by π/2,

wherein the correction circuit includes a gain correction circuit configured to detect a gain correction value on the basis of the mixed signal, and to perform correction processing on a gain error between the plurality of analog-to-digital conversion circuits, on the basis of the gain correction value.

9. The semiconductor integrated circuit according to claim 8 , wherein

the correction circuit includes:

a signal generation circuit configured to generate the mixed signal.

10. The semiconductor integrated circuit according to claim 9 , wherein

the gain correction circuit performs the correction processing on the gain error by multiplying the output signal from at least one of the plurality of analog-to-digital conversion circuits by the gain correction value.

11. The semiconductor integrated circuit according to claim 9 , wherein

the correction circuit configured to perform the gain correction processing and skew correction processing with respect to the analog-to-digital conversion circuit on the basis of the mixed signal, and

the correction circuit further includes a skew correction circuit configured to detect a skew correction value on the basis of the mixed signal generated by the signal generation circuit, and to perform correction processing on a skew between the plurality of analog-to-digital conversion circuits, on the basis of the skew correction value.

12. The semiconductor integrated circuit according to claim 11 , wherein

the skew correction circuit performs the correction processing on the skew by shifting a phase of the output signal from at least one of the plurality of analog-to-digital conversion circuits in accordance with the skew correction value.

13. The semiconductor integrated circuit according to claim 8 , wherein

the gain correction circuit is further configured to generate the mixed signal.

14. The semiconductor integrated circuit according to claim 13 , wherein

the gain correction circuit performs the correction processing on the gain error by multiplying the output signal from at least one of the plurality of analog-to-digital conversion circuits by the gain correction value.

15. An analog-to-digital conversion method for an analog-to-digital converter that comprises a plurality of analog-to-digital conversion circuits and samples an analog input signal at a sampling frequency and converts the analog input signal into a digital output signal, the analog-to-digital conversion method comprising:

converting, by the plurality of analog-to-digital conversion circuits, the analog input signal into the digital output signal in a time-interleaved manner;

generating a mixed signal, the mixed signal being obtained by mixing an output signal from the analog-to-digital conversion circuit with a signal made by shifting a phase of the output signal by 712 ; and

performing gain correction processing with respect to the analog-to-digital conversion circuit, on the basis of the mixed signal,

wherein the performing gain correction processing includes:

detecting a gain correction value on the basis of the mixed signal, and

performing correction processing on a gain error between the plurality of analog-to-digital conversion circuits, on the basis of the gain correction value.

16. The analog-to-digital conversion method according to claim 15 , further comprising

performing skew correction processing with respect to the analog-to-digital conversion circuit, on the basis of the mixed signal,

wherein the performing skew correction processing includes:

detecting a skew correction value on the basis of the mixed signal; and

performing correction processing on a skew between the plurality of analog-to-digital conversion circuits, on the basis of the skew correction value.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2015
From: NOZAKI, TAKESHI
To: SOCIONEXT INC.
Reel/Frame 036547/0209 →
Priority Claims (1)
JP 2014-194061 · Sep 24, 2014 · national
Continuity (1)
Related Publication 20160087643A1 · Mar 24, 2016