Pre-fetch chaining

1. An apparatus comprising:

a cache pre-fetcher configured to predict, based at least in part upon a virtual address, data to be retrieved from a memory system; and

a pre-fetch scheduler configured to:

convert the virtual address of the data to a physical address of the data, and

request the data from a determined one of a plurality of levels of the memory system, wherein:

if a determined level comprises a first level of the memory system, injecting requests for data for the pre-fetched data into a first level fill buffer configured to store requests for data to be stored within the first level of the memory system,

if the determined level comprises a second level of the memory system and if the second level fill buffer does include capacity to store the requests for data, injecting requests for data for the pre-fetched data into a second level fill buffer configured to store the requests for data to be stored within the second level of the memory system, and

if the determined level comprises the second level of the memory system and the second level fill buffer does not include capacity to store the requests for data, injecting requests for data for the pre-fetched data into a second level pre-fetch request buffer configured to store the requests for data that are to be placed within the second level fill buffer when the second level fill buffer comprises capacity for an additional request for data; and

wherein the memory system comprises a plurality of levels, each level of the memory system configured to store data.

2. The apparatus of claim 1 , wherein the pre-fetch scheduler is configured to:

request the data be placed into one of a plurality of levels of the memory system based upon a predefined set of criteria involving an available amount of system resources.

3. The apparatus of claim 2 ,

wherein the predefined set of criteria involving an available amount of system resources comprises a determination as to whether the first level fill buffer is capable of storing more requests for data.

4. The apparatus of claim 2 , wherein cache pre-fetcher is configured to cross a page boundary when predicting data to be retrieved from the memory system; and

wherein the predefined set of criteria involving an available amount of system resources comprises a determination as that the physical address of the data is not comprised by a restricted memory area.

5. The apparatus of claim 1 , wherein the pre-fetch scheduler is configured to:

request the data from one of a plurality of levels of the memory system based upon the physical address of the data.

6. The apparatus of claim 1 , wherein the pre-fetch scheduler is configured to:

request the physical address of the data from a translation look aside buffer.

7. The apparatus of claim 1 , wherein the pre-fetch scheduler is configured to pre-fetch a translation look-aside buffer entry.

8. A method comprising:

predicting, based at least in part upon a virtual address, data likely to be accessed, from a memory system, by an instruction;

selecting, from a plurality of levels of the memory system, a determined level of the memory system to store pre-fetched data, wherein the pre-fetched data comprises the data predicted to be accessed by the instruction; and

causing the pre-fetched data to be stored by the determined level of the memory system before the pre-fetched data is accessed by the instruction, wherein:

if the determined level comprises a first level of the memory system, injecting requests for data for the pre-fetched data into a first level fill buffer configured to store requests for data to be stored within the first level of the memory system,

if the determined level comprises the second level of the memory system and if the second level fill buffer does include capacity to store the requests for data, injecting requests for data for the pre-fetched data into a second level fill buffer configured to store the requests for data to be stored within the second level of the memory system, and

if the determined level comprises the second level of the memory system and the second level fill buffer does not include capacity to store the requests for data, injecting requests for data for the pre-fetched data into a second level pre-fetch request buffer configured to store the requests for data that are to be placed within the second level fill buffer when the second level fill buffer comprises capacity for an additional request for data.

9. The method of claim 8 , wherein selecting a determined level of the memory system comprises:

selecting a first level of the memory system if the first level fill buffer associated with the first level of the memory system comprises capacity for an additional request for the pre-fetch data, and

selecting the second level of the memory system if the first level fill buffer associated with the first level of the memory system does not comprise capacity for an additional request for the pre-fetch data.

10. The method of claim 8 , wherein predicting data likely to be accessed by an instruction comprises:

crossing a page boundary when predicting data.

11. The method of claim 8 , wherein predicting data likely to be accessed by an instruction comprises:

converting the virtual address associated with the pre-fetch data to a physical address; and

determining that the physical address is not comprised by a restricted memory area.

12. The method of claim 8 , wherein predicting data likely to be accessed by an instruction comprises:

converting the virtual address associated with the pre-fetch data to a physical address via a translation look aside buffer; and

wherein converting the virtual address comprises pre-fetching a translation look-aside buffer entry.

13. A system comprising:

an execution unit configured to execute one or more instructions;

a pre-fetch unit configured to:

identify pre-fetched data by predicting, based at least in part upon a virtual address, data to be accessed by one or more of the instructions, and

cause the pre-fetched data to be stored within a determined one of a plurality of levels of a memory system prior to the pre-fetched data being accessed by the instruction, wherein:

if a determined level comprises a first level of the memory system, injecting requests for data for the pre-fetched data into a first level fill buffer configured to store requests for data to be stored within the first level of the memory system,

if the determined level comprises a second level of the memory system and if the second level fill buffer does include capacity to store the requests for data, injecting requests for data for the pre-fetched data into a second level fill buffer configured to store the requests for data to be stored within the second level of the memory system, and

if the determined level comprises the second level of the memory system and the second level fill buffer does not include capacity to store the requests for data, injecting requests for data for the pre-fetched data into a second level pre-fetch request buffer configured to store the requests for data that are to be placed within the second level fill buffer when the second level fill buffer comprises capacity for an additional request for data; and

the memory system comprising a plurality of levels, wherein each level of the memory system is configured to store data.

14. The system of claim 13 , wherein the pre-fetch unit is configured to cross a page boundary when predicting data to be accessed by the one or more of the instructions; and

convert the virtual address associated with the pre-fetched data to a physical address.

15. The system of claim 13 , wherein the pre-fetch unit is configured to:

request a physical address associated with the pre-fetched data from a translation look-aside buffer, and

cause the translation look-aside buffer to pre-fetch a translation look-aside buffer entry.