IP Library › Granted Patent US 9,570,403
Granted Patent B2
US 9,570,403 · App. 15/179,593 · Granted Feb 14, 2017

Secure chip with physically unclonable function

Inventors: Qing Cao (Yorktown Heights, NY); Kangguo Cheng (Schenectady, NY); Fei Liu (Yorktown Heights, NY)
Assignee: International Business Machines Corporation
H01L23/544H01L21/0243H01L21/0262H01L21/02488H01L21/02494H01L21/02667H01L21/3083H01L21/31144H01L23/576H01L29/0692H01L29/32H01L29/6609H01L29/66409H01L29/66969H01L29/772H01L29/78H01L29/861H04L9/3278H01L2223/5444
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Quick Facts
Patent No.
US 9,570,403
App. No.
15/179,593
Granted
Feb 14, 2017
Kind
B2
Abstract

A first trench having a first aspect ratio and a second trench having a second aspect ratio that is greater than the first trench are provided into a material stack of a semiconductor substrate and a dielectric material. An epitaxial semiconductor material having a different lattice constant than the substrate is then grown within each of the first and second trenches. The semiconductor material which is epitaxially formed in the first trench has an upper semiconductor material portion that is entirely defect free, while the semiconductor material which is epitaxially formed in the second trench has defects that randomly propagate to the topmost surface of the semiconductor material. At least one semiconductor device is then formed on each epitaxially grown semiconductor material. The at least one semiconductor device located on the epitaxially grown semiconductor material formed in the second trench is a physical unclonable function device.

Claims (20)

1. A method of forming a semiconductor structure, said method comprising:

providing a material stack of, from bottom to top, a semiconductor substrate and a dielectric material;

forming a first trench having a first aspect ratio in a first region of said material stack and a second trench having a second aspect ratio that is greater than said first aspect ratio in a second region of said material stack, said first and second trenches exposing an upper semiconductor material portion of said semiconductor substrate;

growing a semiconductor material having a different lattice constant than said upper semiconductor material portion of said semiconductor substrate in said first trench and in said second trench, wherein said semiconductor material formed in said first trench has a lower semiconductor material portion that contains defects and an upper semiconductor material portion that is defect free, and said semiconductor material formed in said second trench contains defects that randomly propagate to a topmost surface of said semiconductor material; and

forming at least one semiconductor device on said epitaxial semiconductor material located in said first and second trenches, wherein said at least one semiconductor device formed on said epitaxial semiconductor material in said second trench is a physical unclonable function device.

2. The method of claim 1 , wherein said growing said semiconductor material comprises an aspect ratio trapping process.

3. The method of claim 1 , wherein said semiconductor material formed in said first trench and said second trench each has a topmost surface that is coplanar with a topmost surface of said dielectric material.

4. The method of claim 1 , wherein said forming said first trench and said second trench comprises lithography and etching.

5. The method of claim 1 , wherein a width of said first trench is narrower than a width of said second trench, and said first trench and said second trench have a same height.

6. The method of claim 1 , wherein said upper semiconductor material portion of said semiconductor substrate is comprised of silicon, and said semiconductor material formed in said first trench and said second trench comprises germanium, an III-V compound semiconductor or an II-VI compound semiconductor.

7. The method of claim 1 , wherein said first and second trenches within said uppermost semiconductor material portion of said semiconductor substrate have tapered sidewalls.

8. The method of claim 1 , wherein said forming said at least one semiconductor device comprises forming a field effect transistor.

9. The method of claim 8 , further comprising forming a trench isolation region within said epitaxial semiconductor material, prior to said forming of said at least one semiconductor device.

10. The method of claim 1 , wherein said forming said at least one semiconductor device comprises forming a semiconductor diode.

11. The method of claim 10 , wherein said semiconductor diode comprises a first semiconductor material diode portion of a first conductivity type, and a second semiconductor material diode portion of a second conductivity type, said second conductivity type is opposite said first conductivity type.

12. The method of claim 1 , wherein said at least one semiconductor device located on said epitaxial semiconductor material in said second trench comprises a defect-free semiconductor device and a defect-containing device.

13. The method of claim 1 , wherein said first trench in said first region of said material stack and said second trench in said second region of said material stack are formed sequentially.

14. The method of claim 1 , wherein said first aspect ratio is from 1:50 to 1:1.2 and said second aspect ratio is from 10:1 to 1:1.

15. The method of claim 1 , wherein said growing said semiconductor material comprises a selective epitaxial growth process.

16. The method of claim 1 , wherein said semiconductor material formed in said first and second trenches has an epitaxial relationship with said exposed upper semiconductor material portion of said semiconductor substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2016
From: CAO, QING; CHENG, KANGGUO; LIU, FEI
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 038881/0821 →
Continuity (2)
Division 14625062 · Feb 18, 2015
Related Publication 20160284647A1 · Sep 29, 2016