IP Library › Granted Patent US 9,570,509
Granted Patent B2
US 9,570,509 · App. 14/609,169 · Granted Feb 14, 2017

Magnetic tunnel junction (MTJ) device array

Inventors: Vladimir Machkaoutsan (Leuven, BE); Matthias Georg Gottwald (Heverlee, BE); Mustafa Badaroglu (Leuven, BE); Jimmy Kan (San Diego, CA); Kangho Lee (San Diego, CA); Yu Lu (San Diego, CA); Chando Park (San Diego, CA)
Assignee: QUALCOMM Incorporated
H01L27/222H01L43/02H01L43/08H01L43/12
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Quick Facts
Patent No.
US 9,570,509
App. No.
14/609,169
Granted
Feb 14, 2017
Kind
B2
Abstract

A semiconductor device includes a first magnetic tunnel junction (MTJ) device, a second MTJ device, and a top electrode. The first MTJ device includes a barrier layer. The second MTJ device includes the barrier layer. The top electrode is coupled to the first MTJ device and the second MTJ device.

Claims (44)

1. A semiconductor device comprising:

a first magnetic tunnel junction (MTJ) device comprising a barrier layer and a magnetic layer, wherein the magnetic layer comprises a pinned magnetic layer; and

a second MTJ device comprising the barrier layer and the magnetic layer;

a top electrode coupled to the first MTJ device and the second MTJ device; and

a via that couples the pinned magnetic layer to the top electrode.

2. The semiconductor device of claim 1 , wherein the first MTJ device includes a first free layer, and wherein the second MTJ device includes a second free layer.

3. The semiconductor device of claim 1 , wherein the pinned magnetic layer is positioned between the barrier layer and the top electrode.

4. The semiconductor device of claim 1 , wherein a portion of the pinned magnetic layer is positioned between the first MTJ device and the second MTJ device.

5. The semiconductor device of claim 1 , further comprising a third MTJ device comprising a third free layer, the barrier layer, and the pinned magnetic layer, wherein the third MTJ device is coupled to the top electrode.

6. The semiconductor device of claim 1 , further comprising a second via that couples the pinned magnetic layer to the top electrode, the top electrode common to the first MTJ device and the second MTJ device.

7. The semiconductor device of claim 6 , wherein the via is distinct from the second via.

8. The semiconductor device of claim 1 , wherein a portion of the barrier layer is positioned between the first MTJ and the second MTJ.

9. The semiconductor device of claim 1 , further comprising a first bottom electrode coupled to the first MTJ device.

10. The semiconductor device of claim 9 , further comprising a second bottom electrode coupled to the second MTJ device, wherein the first bottom electrode is distinct from the second bottom electrode.

11. A method comprising:

receiving a data file including design information corresponding to a semiconductor device; and

fabricating the semiconductor device according to the design information, wherein the semiconductor device includes:

a first magnetic tunnel junction (MTJ) device comprising a barrier layer and a magnetic layer, wherein the magnetic layer comprises a pinned magnetic layer; and

a second MTJ device comprising the barrier layer and the magnetic layer;

a top electrode coupled to the first MTJ device and the second MTJ device; and

a via that couples the pinned magnetic layer to the top electrode.

12. The method of claim 11 , wherein the first MTJ device includes a first free layer, and wherein the second MTJ device includes a second free layer.

13. The method of claim 11 , wherein the pinned magnetic layer is positioned between the barrier layer and the top electrode.

14. The method of claim 11 , wherein a portion of the pinned magnetic layer is positioned between the first MTJ device and the second MTJ device.

15. The method of claim 11 , wherein the semiconductor device further comprises a third MTJ device comprising a third free layer, the barrier layer, and the pinned magnetic layer, wherein the third MTJ device is coupled to the top electrode.

16. The method of claim 11 , wherein the semiconductor device further comprises a second via that couples the pinned magnetic layer to the top electrode, the top electrode common to the first MTJ device and the second MTJ device.

17. The method of claim 16 , wherein the via is distinct from the second via.

18. The method of claim 11 , wherein a portion of the barrier layer is positioned between the first MTJ and the second MTJ.

19. The method of claim 11 , wherein the semiconductor device further comprises a first bottom electrode coupled to the first MTJ device.

20. The method of claim 19 , wherein the semiconductor device further comprises a second bottom electrode coupled to the second MTJ device, wherein the first bottom electrode is distinct from the second bottom electrode.

21. A non-transitory computer-readable medium comprising commands that, when executed by a manufacturing equipment, cause the manufacturing equipment to fabricate a semiconductor device, the semiconductor device comprising:

a first magnetic tunnel junction (MTJ) device comprising a barrier layer and a magnetic layer, wherein the magnetic layer comprises a pinned magnetic layer; and

a second MTJ device comprising the barrier layer and the magnetic layer;

a top electrode coupled to the first MTJ device and the second MTJ device; and

a via that couples the pinned magnetic layer to the top electrode.

22. The non-transitory computer-readable medium of claim 21 , wherein the first MTJ device includes a first free layer, and wherein the second MTJ device includes a second free layer.

23. The non-transitory computer-readable medium of claim 21 , wherein the pinned magnetic layer is positioned between the barrier layer and the top electrode.

24. The non-transitory computer-readable medium of claim 21 , wherein a portion of the pinned magnetic layer is positioned between the first MTJ device and the second MTJ device.

25. The non-transitory computer-readable medium of claim 21 , wherein the semiconductor device further comprises a third MTJ device comprising a third free layer, the barrier layer, and the pinned magnetic layer, wherein the third MTJ device is coupled to the top electrode.

26. The non-transitory computer-readable medium of claim 21 , wherein the semiconductor device further comprises a second via that couples the pinned magnetic layer to the top electrode, the top electrode common to the first MTJ device and the second MTJ device.

27. The non-transitory computer-readable medium of claim 26 , wherein the via is distinct from the second via.

28. The non-transitory computer-readable medium of claim 21 , wherein a portion of the barrier layer is positioned between the first MTJ and the second MTJ.

29. The non-transitory computer-readable medium of claim 21 , wherein the semiconductor device further comprises a first bottom electrode coupled to the first MTJ device.

30. The non-transitory computer-readable medium of claim 29 , wherein the semiconductor device further comprises a second bottom electrode coupled to the second MTJ device, wherein the first bottom electrode is distinct from the second bottom electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 6, 2015
From: MACHKAOUTSAN, VLADIMIR; GOTTWALD, MATTHIAS GEORG; BADAROGLU, MUSTAFA; KAN, JIMMY; LEE, KANGHO; LU, YU; PARK, CHANDO
To: QUALCOMM INCORPORATED
Reel/Frame 035108/0136 →
Continuity (1)
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