IP Library Granted Patent US 9,570,613
Granted Patent B2
US 9,570,613 · App. 14/622,180 · Granted Feb 14, 2017

Structure and formation method of FinFET device

Inventors: Kai-Hsuan Lee (Hsinchu, TW); Cheng-Yu Yang (Xihu Township, Changhua County, TW); Hsiang-Ku Shen (Hsinchu, TW); Han-Ting Tsai (Kaoshiung, TW); Yimin Huang (Hsinchu, TW)
Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
H01L29/785H01L21/0223H01L21/3065H01L21/76224H01L29/161H01L29/36H01L29/495H01L29/66431H01L29/66795H01L29/802H01L29/165
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Quick Facts
Patent No.
US 9,570,613
App. No.
14/622,180
Granted
Feb 14, 2017
Kind
B2
Abstract

Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a semiconductor substrate and a fin structure over the semiconductor substrate. The semiconductor device structure also includes a gate stack over a portion of the fin structure, and the fin structure includes an intermediate portion under the gate stack and upper portions besides the intermediate portion. The semiconductor device structure further includes a contact layer over the fin structure. The contact layer includes a metal material, and the upper portions of the fin structure also include the metal material.

Claims (38)

1. A semiconductor device structure, comprising:

a semiconductor substrate;

a fin structure over the semiconductor substrate;

a gate stack over the fin structure, wherein the fin structure includes an intermediate portion under the gate stack, upper portions besides the intermediate portion, and a lower portion below the upper portions and the intermediate portion;

a contact layer over the fin structure, wherein the contact layer comprises a metal material, and the upper portions of the fin structure also comprise the metal material; and

a carbon-containing layer between the semiconductor substrate and the fin structure, wherein the carbon-containing layer surrounds the lower portion of the fin structure.

2. The semiconductor device structure as claimed in claim 1 , wherein the metal material comprises tin, lead, or a combination thereof.

3. The semiconductor device structure as claimed in claim 1 , wherein a concentration of the metal material in each of the upper portions gradually decreases along a direction away from an interface between the fin structure and the contact layer.

4. The semiconductor device structure as claimed in claim 1 , wherein the fin structure comprises germanium.

5. The semiconductor device structure as claimed in claim 4 , wherein the contact layer further comprises germanium.

6. The semiconductor device structure as claimed in claim 5 , wherein a concentration of germanium in the contact layer gradually decreases along a direction away from an interface between the fin structure and the contact layer.

7. The semiconductor device structure as claimed in claim 1 , wherein the lower portion of the fin structure further comprises carbon.

8. The semiconductor device structure as claimed in claim 7 , wherein a concentration of carbon in the lower portion gradually decreases along a direction away from an interface between the fin structure and the carbon-containing layer.

9. The semiconductor device structure as claimed in claim 1 , further comprising a semiconductor blocking layer between the intermediate portion of the fin structure and the gate stack.

10. The semiconductor device structure as claimed in claim 1 , wherein the contact layer surrounds the upper portions of the fin structure.

11. A semiconductor device structure, comprising:

a semiconductor substrate;

a germanium-containing fin structure over the semiconductor substrate;

a metal gate stack over a portion of the germanium-containing fin structure; and

a carbon-containing layer between the semiconductor substrate and the germanium-containing fin structure, wherein the carbon-containing layer surrounds a lower portion of the germanium-containing fin structure.

12. The semiconductor device structure as claimed in claim 11 , further comprising a contact layer over the germanium-containing fin structure, wherein the contact layer comprises a metal material, and another portion of the germanium-containing fin structure that is under the contact layer also comprises the metal material.

13. The semiconductor device structure as claimed in claim 12 , wherein the metal material comprises tin, lead, or a combination thereof.

14. The semiconductor device structure as claimed in claim 11 , further comprising:

a dielectric layer over the contact layer; and

a conductive contact in the dielectric layer and is in electrical contact with the contact layer.

15. The semiconductor device structure as claimed in claim 11 , further comprising a semiconductor blocking layer between the germanium-containing fin structure and the metal gate stack, wherein the semiconductor blocking layer comprises a semiconductor material.

16. A method for forming a semiconductor device structure, comprising:

forming a carbon-containing layer over a semiconductor substrate;

forming a fin structure over the semiconductor substrate, wherein the carbon-containing layer surrounds a lower portion of the fin structure;

forming a gate stack over the fin structure;

forming a contact layer over the fin structure, wherein the contact layer comprises a metal material; and

driving a portion of the metal material from the contact layer into the fin structure.

17. The method for forming a semiconductor device structure as claimed in claim 16 , wherein the formation of the carbon-containing layer over the semiconductor substrate is performed before the fin structure is formed.

18. The method for forming a semiconductor device structure as claimed in claim 16 , wherein the portion of the metal material is driven into the fin structure using a thermal operation.

19. The method for forming a semiconductor device structure as claimed in claim 16 , further comprising forming a semiconductor blocking layer over the fin structure before the gate stack is formed.

20. The method for forming a semiconductor device structure as claimed in claim 19 , further comprising:

oxidizing a portion of the semiconductor blocking layer not covered by the gate stack; and

removing the oxidized portion of the semiconductor blocking layer before the contact layer is formed.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2015
From: LEE, KAI-HSUAN; YANG, CHENG-YU; SHEN, HSIANG-KU; TSAI, HAN-TING; HUANG, YIMIN
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 035074/0122 →
Continuity (1)
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