IP Library › Granted Patent US 9,577,691
Granted Patent B2
US 9,577,691 · App. 15/173,815 · Granted Feb 21, 2017

Front end circuit

Inventor: Kunitoshi Hanaoka (Nagaokakyo, JP)
Assignee: Murata Manufacturing Co., Ltd
H04B1/16H04B1/006H04L5/14
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Quick Facts
Patent No.
US 9,577,691
App. No.
15/173,815
Granted
Feb 21, 2017
Kind
B2
Abstract

A front end circuit includes a switch including a common terminal and a plurality of individual terminals, in which at least two kinds of reception signals of different frequency bands are input to the common terminal, and in which one of the at least two kinds of reception signals is output to an individual terminal selected from the plurality of individual terminals, and in which a non-selected terminal is grounded, and a balun including a first terminal and a second terminal defining unbalanced ports as well as a third terminal and a fourth terminal defining balanced ports. The first individual terminal of the switch is indirectly connected to the first terminal of the balun and the second individual terminal of the switch is indirectly connected to the second terminal of the balun. The at least two kinds of reception signals are output in a balanced mode from the third terminal and the fourth terminal of the balun.

Claims (27)

1. A front end circuit comprising:

a switch that includes a common terminal and a plurality of individual terminals including a first individual terminal and a second individual terminal, inputs to the common terminal at least two kinds of reception signals of different frequency bands which do not sandwich a transmission frequency band and in which at least a portion of reception frequency bands are close to or overlap with each other, outputs one of the at least two kinds of reception signals to an individual terminal selected from the first and second individual terminals, and grounds a non-selected terminal; and

a balun including a first terminal and a second terminal defining unbalanced ports and a third terminal and a fourth terminal defining balanced ports; wherein

the first individual terminal of the switch is directly or indirectly connected to the first terminal of the balun, the second individual terminal of the switch is directly or indirectly connected to the second terminal of the balun, and the at least two kinds of reception signals are output in a balanced mode from the third terminal and the fourth terminal of the balun.

2. The front end circuit according to claim 1 , further comprising:

filters that pass the at least two types of reception signals interposed between the first individual terminal of the switch and the first terminal of the balun and between the second individual terminal of the switch and the second terminal of the balun.

3. The front end circuit according to claim 1 , wherein the balun has a bandpass characteristic that allows the at least two kinds of reception signals to pass.

4. The front end circuit according to claim 1 , wherein the transmission frequency band and the reception frequency bands are frequency bands of Long Term Evolution.

5. The front end circuit according to claim 1 , wherein one of the reception frequency bands is in a range from 2110 MHz to 2170 MHz, another of the reception frequency bands is in a range from 2110 MHz to 2155 MHz, and the transmission frequency band is in a range from 1920 MHz to 1980 MHz or 1710 MHz to 1755 MHz.

6. The front end circuit according to claim 1 , wherein the switch is a short-type single pole, dual throw high frequency switch.

7. The front end circuit according to claim 1 , further comprising duplexers that separate a transmission signal from the reception signals.

8. The front end circuit according to claim 1 , further comprising duplexers each including a transmission filter and a reception filter.

9. The front end circuit according to claim 8 , wherein a pass band of the reception filter of one of the duplexers and a pass band of the reception filter of another one of the duplexers do not include a transmission frequency band of the different frequency bands.

10. The front end circuit according to claim 1 , wherein the balun defines and functions as both a balance-unbalance converter and a reception filter.

11. A communication device comprising the front end circuit according to claim 1 .

12. A front end circuit comprising:

a first switch and a second switch each including a common terminal and a plurality of individual terminals, and a balun including a first terminal and a second terminal defining unbalanced ports and a third terminal and a fourth terminal defining balanced ports; wherein

two kinds of reception signals of different frequency bands which do not sandwich a transmission frequency band and in which at least a portion of reception frequency bands are close to or overlap with each other are input to the common terminal of the first switch and the common terminal of the second switch; and

one of the plurality of individual terminals of the first switch is directly or indirectly connected to the first terminal of the balun, one of the plurality of individual terminals of the second switch is directly or indirectly connected to the second terminal of the balun, and the two kinds of reception signals are output in a balanced mode from the third terminal and the fourth terminal of the balun.

13. The front end circuit according to claim 12 , further comprising a first duplexer for a first of the different frequency bands, a second duplexer for a second of the different frequency bands, and a reception filter for each of the first and second frequency bands.

14. The front end circuit according to claim 13 , wherein a pass band of a reception filter of the first duplexer and a pass band of a reception filter of the second duplexer do not include a transmission frequency band of the different frequency bands.

15. The front end circuit according to claim 12 , wherein the front end circuit is connected to a plurality of antennas.

16. The front end circuit according to claim 12 , further comprising:

filters that pass the at least two types of reception signals interposed between the first individual terminal of the switch and the first terminal of the balun and between the second individual terminal of the switch and the second terminal of the balun.

17. The front end circuit according to claim 12 , wherein the balun has a bandpass characteristic that allows the at least two kinds of reception signals to pass.

18. The front end circuit according to claim 12 , wherein the transmission frequency band and the reception frequency bands are frequency bands of Long Term Evolution.

19. A communication device comprising the front end circuit according to claim 12 .

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 6, 2016
From: HANAOKA, KUNITOSHI
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 038813/0745 →
Priority Claims (1)
JP 2013-270770 · Dec 27, 2013 · national
Continuity (2)
Continuation PCTJP2014077896 · Oct 21, 2014
Related Publication 20160285490A1 · Sep 29, 2016