Silicon germanium alloy fins with reduced defects

1. A method of forming a semiconductor structure, said method comprising:

forming a silicon germanium alloy portion on each sidewall surface of a silicon fin, said silicon fin extending upward from a remaining portion of a silicon substrate, wherein said forming said silicon germanium alloy portion comprises;

epitaxially growing a silicon germanium alloy layer on exposed surfaces of said silicon fin;

forming a sacrificial dielectric structure having a topmost surface that is located beneath a topmost surface of said silicon fin;

forming a sacrificial spacer on a sidewall surface of said silicon germanium alloy layer not protected by said sacrificial dielectric structure;

removing said sacrificial dielectric structure;

removing portions of said silicon germanium alloy layer not protected by said sacrificial spacer to provide each silicon germanium alloy portion; and

removing said sacrificial spacer;

providing a trench isolation dielectric material on exposed surfaces of said remaining portion of said silicon substrate and on exposed sidewall surfaces of each silicon germanium alloy portion and said silicon fin; and

converting a portion of the silicon fin that is located laterally adjacent each silicon germanium alloy portion into a silicon germanium alloy fin, wherein said silicon germanium alloy fin comprises a wide upper portion and a narrower lower portion, wherein said silicon germanium alloy fin has a vertically graded germanium content in which said wide upper portion of said silicon germanium alloy fin has a greater germanium content than said narrower lower portion of said silicon germanium alloy fin and wherein sidewall surfaces of said narrower lower portion of said silicon germanium alloy fin are vertically coincident with sidewall surfaces of said silicon fin portion.

2. The method of claim 1 , wherein said converting comprises an oxidation process or a thermal anneal in an inert ambient.

3. The method of claim 1 , wherein said silicon fin comprises a hard mask cap, said hard mask cap is formed prior to forming said silicon germanium alloy layer.

4. The method of claim 1 , further comprising recessing said trench isolation dielectric material to expose a portion of said wide upper portion of the silicon germanium alloy fin and to provide a trench isolation structure.

5. The method of claim 1 , further comprising forming a functional gate structure straddling said exposed portion of said wide upper portion of said silicon germanium alloy fin.

6. A method of forming a semiconductor structure, said method comprising:

forming a silicon germanium alloy layer on each sidewall surface of a silicon fin, said reduced silicon fin extending upward from a silicon pedestal portion which is present on a silicon base substrate;

providing a trench isolation dielectric material on exposed surfaces of said silicon base substrate and on exposed sidewall surfaces of each silicon germanium layer and said silicon fin; and

converting a portion of the silicon fin that is located laterally adjacent each silicon germanium layer into a silicon germanium alloy fin, wherein said silicon germanium alloy fin comprises a narrow upper portion and a wider lower portion, wherein said silicon germanium alloy fin has a vertically graded germanium content in which said narrow upper portion of said silicon germanium alloy fin has a greater germanium content than said wider lower portion of said silicon germanium alloy fin and wherein sidewall surfaces of said wider lower portion of said silicon germanium alloy fin are vertically coincident with sidewall surfaces of said silicon pedestal portion.

7. The method of claim 6 , wherein said converting comprises an oxidation process or a thermal anneal in an inert ambient.

8. The method of claim 6 , wherein said forming said silicon germanium alloy layer comprises

providing an initial silicon fin having a first width, said initial silicon fin is capped with a hard mask material;

thinning said initial silicon fin to provide said silicon fin, said silicon fin having a second width that is less than the first width; and

epitaxially growing said silicon germanium alloy layer.

9. The method of claim 8 , further comprising:

forming a dielectric spacer on exposed surfaces of said silicon germanium alloy layer; and

recessing exposed portion of a remaining portion of a silicon substrate to provide said silicon pedestal portion present on said silicon base substrate.

10. The method of claim 6 , further comprising recessing said trench isolation dielectric material to expose a portion of said narrow upper portion of the silicon germanium alloy fin and to provide a trench isolation structure.

11. The method of claim 10 , further comprising forming a functional gate structure straddling said exposed portion of said narrow upper portion of said silicon germanium alloy fin.