IP Library › Granted Patent US 9,584,178
Granted Patent B2
US 9,584,178 · App. 14/336,430 · Granted Feb 28, 2017

Correlating pseudonoise sequences in an SIMD processor

Inventors: Jeffrey H. Derby (Chapel Hill, NC); Dheeraj Sreedhar (Karnataka, IN)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
H04B1/709G06F9/3001G06F9/30036G06F9/3887
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Quick Facts
Patent No.
US 9,584,178
App. No.
14/336,430
Granted
Feb 28, 2017
Kind
B2
Abstract

In one embodiment, a method includes receiving a signal having communication data from two or more mobile devices, each identifiable by an associated pseudonoise sequence. A first mobile device is identifiable by a first pseudonoise sequence. Two or more samples of the received signal are stored in an input register. A segment of the first pseudonoise sequence is stored as a bit vector in a second register. The SIMD instruction is processed, by an SIMD processor, to produce correlation values associated with the segment of the first pseudonoise sequence and the samples of the received signal. Processing the SIMD instruction includes distributing the segment of the first pseudonoise sequence, as a bit vector, across two or more lanes of the SIMD processor. The processing contributes to despreading the received signal, and an output of the processing includes at least a portion of the communication data from the first mobile device.

Claims (32)

1. A computer-implemented method, comprising:

receiving a signal comprising communication data from two or more mobile devices, wherein each of the two or more mobile devices is identifiable by an associated pseudonoise sequence, and wherein a first mobile device of the two or more mobile devices is identifiable by an associated first pseudonoise sequence;

storing two or more samples of the received signal in an input register;

storing a segment of the first pseudonoise sequence as a bit vector in a second register wherein the segment comprises a sequence of data elements of the first pseudonois sequence, each data element of the segment represented by no more than two bits in the bit vector, and wherein the sequence of data elements occupies sequential bit positions within the second register; and

processing a single instruction multiple data (SIMD) instruction, by an SIMD processor, to produce correlation values associated with the segment of the first pseudonoise sequence in the second register and the two or more samples of the received signal in the input register;

wherein the processing of the SIMD instruction comprises distributing the bit vector representing the segment of the first pseudonoise sequence in the second register across two or more lanes of the SIMD processor, wherein a first data element of the sequence of data elements stored in the bit vector is assigned to a first lane of the SIMD processor and a second data element of the sequence of data elements stored in the bit vector is assigned to a second lane of the SIMD processor, and wherein the first lane and the second lane are distinct from each other; and

wherein the processing of the SIMD instruction contributes to despreading the received signal, and wherein an output of the processing of the SIMD instruction comprises at least a portion of the communication data from the first mobile device.

2. The method of claim 1 , wherein the SIMD instruction indicates a location of the bit vector represented the segment of the first pseudonoise sequence within the second register.

3. The method of claim 1 , wherein there exists a one-to-one association between bits in the bit vector representing the segment of the first pseudonoise sequence and data elements in the two or more samples of the received signal.

4. The method of claim 1 , wherein there exists a one-to-one association between bits in the bit vector representing the segment of the first pseudonoise sequence and parallel computation paths in the SIMD processor.

5. A system comprising:

a non-transitory memory having computer readable instructions; and

a processor configured to execute the computer readable instructions, the instructions comprising:

receiving a signal comprising communication data from two or more mobile devices, wherein each of the two or more mobile devices is identifiable by an associated pseudonoise sequence, and wherein a first mobile device of the two or more mobile devices is identifiable by an associated first pseudonoise sequence;

storing two or more samples of the received signal in an input register;

storing a segment of the first pseudonoise sequence as a bit vector in a second register, wherein the segment comprises a sequence of data elements of the first pseudonois sequence, each data element of the segment represented by no more than two bits in the bit vector, and wherein the sequence of data elements occupies sequential bit positions within the second register; and

submitting a single instruction multiple data (SIMD) instruction to an SIMD processor for processing, to produce correlation values associated with the segment of the first pseudonoise sequence in the second register and the two or more samples of the received signal in the input register;

wherein the processing of the SIMD instruction comprises distributing the bit vector representing the segment of the first pseudonoise sequence in the second register across two or more lanes of the SIMD processor, wherein a first data element of the sequence of data elements stored in the bit vector is assigned to a first lane of the SIMD processor and a second data element of the sequence of data elements stored in the bit vector is assigned to a second lane of the SIMD processor, and wherein the first lane and the second lane are distinct from each other; and

wherein the processing of the SIMD instruction contributes to despreading the received signal, and wherein an output of the processing of the SIMD instruction comprises at least a portion of the communication data from the first mobile device.

6. The system of claim 5 , wherein the SIMD instruction indicates a location of the bit vector represented the segment of the first pseudonoise sequence within the second register.

7. The system of claim 5 , wherein there exists a one-to-one association between bits in the bit vector representing the segment of the first pseudonoise sequence and data elements in the two or more samples of the received signal.

8. The system of claim 5 , wherein there exists a one-to-one association between bits in the bit vector representing the segment of the first pseudonoise sequence and parallel computation paths in the SIMD processor.

9. A computer program product for despreading a received signal, the computer program product comprising a non-transitory computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method comprising:

receiving a signal comprising communication data from two or more mobile devices, wherein each of the two or more mobile devices is identifiable by an associated pseudonoise sequence, and wherein a first mobile device of the two or more mobile devices is identifiable by an associated first pseudonoise sequence;

storing two or more samples of the received signal in an input register;

storing a segment of the first pseudonoise sequence as a bit vector in a second register, wherein the segment comprises a sequence of data elements of the first pseudonois sequence, each data element of the segment represented by no more than two bits in the bit vector, and wherein the sequence of data elements occupies sequential bit positions within the second register; and

submitting a single instruction multiple data (SIMD) instruction to an SIMD processor for processing, to produce correlation values associated with the segment of the first pseudonoise sequence in the second register and the two or more samples of the received signal in the input register;

wherein the processing of the SIMD instruction comprises distributing the bit vector representing the segment of the first pseudonoise sequence in the second register across two or more lanes of the SIMD processor, wherein a first data element of the sequence of data elements stored in the bit vector is assigned to a first lane of the SIMD processor and a second data element of the sequence of data elements stored in the bit vector is assigned to a second lane of the SIMD processor, and wherein the first lane and the second lane are distinct from each other; and

wherein the processing of the SIMD instruction contributes to despreading the received signal, and wherein an output of the processing of the SIMD instruction comprises at least a portion of the communication data from the first mobile device.

10. The computer program product of claim 9 , wherein the SIMD instruction indicates a location of the bit vector represented the segment of the first pseudonoise sequence within the second register.

11. The computer program product of claim 9 , wherein there exists a one-to-one association between bits in the bit vector representing the segment of the first pseudonoise sequence and data elements in the two or more samples of the received signal.

12. The computer program product of claim 9 , wherein there exists a one-to-one association between bits in the bit vector representing the segment of the first pseudonoise sequence and parallel computation paths in the SIMD processor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 21, 2014
From: DERBY, JEFFREY H.; SREEDHAR, DHEERAJ
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 033354/0208 →
Continuity (1)
Related Publication 20160020821A1 · Jan 21, 2016