IP Library › Granted Patent US 9,588,801
Granted Patent B2
US 9,588,801 · App. 14/024,451 · Granted Mar 7, 2017

Apparatus and method for improved lock elision techniques

Inventors: Irina Calciu (Santa Clara, CA); Justin E Gottschlich (Santa Clara, CA); Tatiana Shpeisman (Menlo Park, CA); Gilles A Pokam (Fremont, CA)
Assignee: INTEL CORPORATION
G06F9/467G06F9/30181G06F9/526G06F12/1466
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Quick Facts
Patent No.
US 9,588,801
App. No.
14/024,451
Granted
Mar 7, 2017
Kind
B2
Abstract

An apparatus and method for improving the efficiency with which speculative critical sections are executed within a transactional memory architecture. For example, a method in accordance with one embodiment comprises: waiting to execute a speculative critical section of program code until a lock is freed by a current transaction; responsively executing the speculative critical section to completion upon detecting that the lock has been freed, regardless of whether the lock is held by another transaction during the execution of the speculative critical section; once execution of the speculative critical section is complete, determining whether the lock is taken; and if the lock is not taken, then committing the speculative critical section and, if the lock is taken, then aborting the speculative critical section.

Claims (47)

1. A method comprising:

executing a speculative critical section to completion, regardless of whether a lock is held by another transaction at the start of or during the execution of the speculative critical section, wherein the other transaction comprises a non-speculative critical section (NCS);

once execution of the speculative critical section is complete, determining whether the lock is taken; and

if the lock is not taken, then committing the speculative critical section and, if the lock is taken due to the speculative critical section ends before the NCS ends, then aborting the speculative critical section when it attempts to commit.

2. The method as in claim 1 wherein the speculative critical section (SCS) starts before the NCS start.

3. The method as in claim 1 wherein the speculative critical section (SCS) starts after the NCS.

4. The method as in claim 1 wherein aborting the speculative critical section comprises not committing the results of the speculative critical section.

5. A processor comprising:

an execution component to execute a speculative critical section to completion, regardless of whether a lock is held by another transaction at the start of or during the execution of the speculative critical section, wherein the other transaction comprises a non-speculative critical section (NCS);

a finalization component to determine whether the lock is taken once execution of the speculative critical section is complete; and

the execution component committing the speculative critical section if the lock is not taken and aborting the speculative critical section when it attempts to commit if the lock is taken due to the speculative critical section ends before the NCS ends.

6. The processor as in claim 5 wherein the speculative critical section (SCS) starts before the NCS starts.

7. The processor as in claim 5 wherein the speculative critical section (SCS) starts after the NCS starts.

8. The processor as in claim 5 wherein aborting the speculative critical section comprises not committing the results of the speculative critical section.

9. A system comprising:

a memory for storing program code and data;

a input/output (IO) communication interface for communicating with one or more peripheral devices;

a network communication interface for communicatively coupling the system to a network; and

a processor comprising:

an execution component to execute a speculative critical section to completion, regardless of whether a lock is held by another transaction at the start of or during the execution of the speculative critical section, wherein the other transaction comprises a non-speculative critical section (NCS);

a finalization component to determine whether the lock is taken once execution of the speculative critical section is complete; and

the execution component committing the speculative critical section if the lock is not taken and aborting the speculative critical section when it attempts to commit if the lock is taken due to the speculative critical section ends before the NCS ends.

10. The system as in claim 9 wherein the speculative critical section (SCS) starts before the NCS starts.

11. The system as in claim 9 wherein the speculative critical section (SCS) starts after the NCS starts.

12. The system as in claim 9 wherein aborting the speculative critical section comprises not committing the results of the speculative critical section.

13. A method comprising:

executing a speculative critical section to completion, regardless of whether a lock is held by another transaction at the start of or during the execution of the speculative critical section, wherein the other transaction comprises a non-speculative critical section (NCS);

once execution of the speculative critical section is complete, determining whether the lock is taken; and

if the lock is not taken due to the speculative critical section ends after the NCS ends, then committing the speculative critical section and, if the lock is taken, then aborting the speculative critical section.

14. The method of claim 13 , wherein the speculative critical section (SCS) starts after the NCS starts.

15. The method of claim 13 , wherein the speculative critical section (SCS) starts before the NCS starts.

16. A processor comprising:

an execution component to execute a speculative critical section to completion, regardless of whether a lock is held by another transaction at the start of or during the execution of the speculative critical section, wherein the other transaction comprises a non-speculative critical section (NCS);

a finalization component to determine whether the lock is taken once execution of the speculative critical section is complete; and

the execution component committing the speculative critical section if the lock is not taken due to the speculative critical section ends after the NCS ends and aborting the speculative critical section if the lock is taken.

17. The processor of claim 16 , wherein the speculative critical section (SCS) starts after the NCS starts.

18. The processor of claim 16 , wherein the speculative critical section (SCS) starts before the NCS starts.

19. A system comprising:

a memory for storing program code and data;

a input/output (JO) communication interface for communicating with one or more peripheral devices;

a network communication interface for communicatively coupling the system to a network; and

a processor comprising:

an execution component to execute a speculative critical section to completion, regardless of whether a lock is held by another transaction at the start of or during the execution of the speculative critical section, wherein the other transaction comprises a non-speculative critical section (NCS);

a finalization component to determine whether the lock is taken once execution of the speculative critical section is complete; and

the execution component committing the speculative critical section if the lock is not taken due to the speculative critical section ends after the NCS ends and aborting the speculative critical section if the lock is taken.

20. The system of claim 19 , wherein the speculative critical section (SCS) starts after the NCS starts.

21. The system of claim 19 , wherein the speculative critical section (SCS) starts before the NCS starts.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2014
From: CALCIU, IRINA; GOTTSCHLICH, JUSTIN E.; SHPEISMAN, TATIANA; POKAM, GILLES A.
To: INTEL CORPORATION
Reel/Frame 033312/0665 →
Continuity (1)
Related Publication 20150074366A1 · Mar 12, 2015