Programmable intelligent search memory (PRISM) and cryptography engine enabled secure DRAM
View Patent ↗Systems comprising a processor and a dynamic random access memory (DRAM). The DRAM comprises a programmable intelligent search memory (PRISM).
1. A system comprising a processor, a dram controller and a Dynamic Random Access Memory (DRAM) comprising a Programmable Intelligent Search Memory (PRISM) for regular expression search using non-deterministic finite state automaton and further comprising a cryptography processing engine for performing encryption and decryption, said PRISM and cryptography processing engines creating a secure DRAM for use in the said system, said PRISM comprising: a) a symbol memory circuit to store symbols or characters; b) a symbol evaluation circuit coupled to the symbol memory circuit to evaluate match of the symbols or characters with input symbols or characters in content to be searched; c) a current state vector (CSV) memory circuit to store a plurality of states; d) a state dependent vector (SDV) memory circuit to store state transition controls for said non-deterministic finite state automaton; and e) a state transition circuit coupled to said symbol evaluation circuit, a current state vector memory circuit and said state dependent vector memory circuit to perform state transition from one or more first states to one or more second states of said plurality of states of said finite state automation.
2. The system of claim 1 , further comprising a means to program the PRISM with regular expression rules.
3. A system comprising a processor, a dram controller and a Dynamic Random Access Memory (DRAM) comprising a Programmable Intelligent Search Memory (PRISM) for regular expression search using non-deterministic finite state automaton, said PRISM comprising: a) a symbol memory circuit to store symbols or characters; b) a symbol evaluation circuit coupled to the symbol memory circuit to evaluate match of the symbols or characters with input symbols or characters in content to be searched; c) a current state vector (CSV) memory circuit to store a plurality of states; d) a state dependent vector (SDV) memory circuit to store state transition controls for said non-deterministic finite state automaton; and e) a state transition circuit coupled to said symbol evaluation circuit, a current state vector memory circuit and said state dependent vector memory circuit to perform state transition from one or more first states to one or more second states of said plurality of states of said finite state automation.
4. A Dynamic Random Access Memory (DRAM) comprising a Programmable Intelligent Search Memory (PRISM) for regular expression search using non-deterministic finite state automaton distributed per bank of the DRAM, said PRISM comprising: a) a symbol memory circuit to store symbols or characters; b) a symbol evaluation circuit coupled to the symbol memory circuit to evaluate match of the symbols or characters with input symbols or characters in content to be searched; c) a current state vector (CSV) memory circuit to store a plurality of states; d) a state dependent vector (SDV) memory circuit to store state transition controls for said non-deterministic finite state automaton; and e) a state transition circuit coupled to said symbol evaluation circuit, a current state vector memory circuit and said state dependent vector memory circuit to perform state transition from one or more first states to one or more second states of said plurality of states of said finite state automation.