Power conversion device
An uneven return current is prevented and increase in a loss is suppressed in a power conversion apparatus at the time of inverter operation. The invention includes first and second transistor switch groups in each of which arms are connected in parallel, and sense resistors for detecting a drain current are connected to the first and second transistor switch groups, and a first drive circuit group and the second drive circuit group include means for monitoring a sense current flowing through the sense resistors and a plurality of delay circuits. Further, rising of the plurality of transistor switch groups is controlled by controlling activation and non-activation of the plurality of delay circuits on the basis of a magnitude of the sense current.
1. A power conversion apparatus, comprising:
a plurality of first transistor switch groups inserted between a first power supply voltage and an output node;
a second transistor switch group inserted between a second power supply voltage higher than the first power supply voltage and the output node;
a first drive circuit group for controlling on/off of the first transistor switch groups; and
a second drive circuit group for controlling on/off of the second transistor switch group, wherein
sense resistors for detecting a drain current are connected to the plurality of first transistor switch groups and the second transistor switch group;
the first drive circuit group and the second drive circuit group each include respective sense nodes for monitoring respective sense currents flowing through the sense resistors and a plurality of delay circuits; and
the power conversion apparatus further comprises a delay control circuit configured to control activation and non-activation of the plurality of the delay circuits on the basis of a magnitude of the sense current, such that a return current is equally divided among said plurality of first transistor switch groups and second transistor switch group.
2. The power conversion apparatus according to claim 1 , wherein
the power conversion apparatus is applied to an inverter circuit;
the first transistor groups are included in an upper arm of the inverter circuit; and
the first transistor groups are included in the upper arm of the inverter circuit.
3. The power conversion apparatus according to claim 1 , wherein
each switching element configuring the transistor switch groups includes, in a chip of the each switching element, means for outputting the sense current in addition to means for outputting the drain current.
4. The power conversion apparatus according to claim 1 , wherein
the first and second drive circuit groups include at least two different reference power supplies.
5. The power conversion apparatus according to claim 1 , wherein
the first and second drive circuit groups have a delay time generating circuit; and
the delay time generating circuit controls a rising time of each of the switching elements of the transistor switch groups.
6. The power conversion apparatus according to claim 1 , wherein
each of the first and second drive circuit groups have a control circuit for controlling activation and non-activation of the delay circuits; and
the first and second drive circuit groups determine operation or non-operation of the control circuit in response to reception of a control signal.
7. A power conversion apparatus, comprising:
a plurality of first transistor switch groups inserted between a first power supply voltage and an output node;
a second transistor switch group inserted between a second power supply voltage higher than the first power supply voltage and the output node;
a first drive circuit group for controlling on/off of the first transistor switch groups; and
a second drive circuit group for controlling on/off of the second transistor switch group, wherein:
sense resistors for detecting a drain current are connected to the plurality of first transistor switch groups and the second transistor switch group;
the first drive circuit group and the second drive circuit group each include respective sense nodes for monitoring respective sense currents flowing through the sense resistors and a plurality of delay circuits; and
rising times of the plurality of transistor switch groups are controlled on the basis of the sense currents in a switching time period subsequent to a switching time period in which the sense currents have been monitored, such that a return current is equally divided among said plurality of first transistor switch groups and second transistor switch group.
8. The power conversion apparatus according to claim 7 , wherein
the power conversion apparatus is applied to an inverter circuit;
the first transistor groups are included in an upper arm of the inverter circuit; and
the first transistor groups are included in the upper arm of the inverter circuit.
9. The power conversion apparatus according to claim 7 , wherein
each switching element configuring the transistor switch groups includes, in a chip of the each switching element, means for outputting the sense current in addition to means for outputting the drain current.
10. The power conversion apparatus according to claim 7 , wherein
the first and second drive circuit groups include at least two different reference power supplies.
11. The power conversion apparatus according to claim 7 , wherein
the first and second drive circuit groups have a delay time generating circuit; and
the delay time generating circuit controls a rising time of each of the switching elements of the transistor switch groups.
12. The power conversion apparatus according to claim 7 , wherein
each of the first and second drive circuit groups have a control circuit for controlling activation and non-activation of the delay circuits; and
the first and second drive circuit groups determine operation or non- operation of the control circuit in response to reception of a control signal.