IP Library › Granted Patent US 9,595,219
Granted Patent B2
US 9,595,219 · App. 14/733,271 · Granted Mar 14, 2017

Scan driver and display device using the same

Inventors: Dahye Shim (Seoul, KR); Joungmi Choi (Paju-si, KR); Hyunguk Jang (Seoul, KR)
Assignee: LG DISPLAY CO., LTD
G09G3/2092G09G2310/0267G09G2310/0286G09G2310/0289G09G2320/041G09G2330/021
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Quick Facts
Patent No.
US 9,595,219
App. No.
14/733,271
Granted
Mar 14, 2017
Kind
B2
Abstract

A scan driver and display device using the same are disclosed. The display device includes display panel, a data driver configured to supply a data signal to the display panel, and a scan driver formed in a non-display area of the display panel, including a shift register composed of a plurality of stages and a level shifter formed outside the display panel, and configured to supply a scan signal to the display panel using the shift register and the level shifter. The scan driver comprises: a sensor circuit unit configured to sense internal and external environmental conditions and generate a compensation circuit control signal on the basis of a sensed result; and a compensation circuit unit generating a compensation signal to compensate outputs of the plurality of stages in response to the compensation circuit control signal.

Claims (44)

1. A display device, comprising:

a display panel;

a data driver configured to supply a data signal to the display panel; and

a scan driver formed in a non-display area of the display panel, including a shift register composed of a plurality of stages and a level shifter formed outside the display panel, and configured to supply a scan signal to the display panel using the shift register and the level shifter,

wherein the scan driver comprises:

a sensor circuit unit configured to sense internal and external environmental conditions and to generate a compensation circuit control signal on the basis of a sensed result; and

a compensation circuit unit configured to generate a compensation signal for compensating outputs of the plurality of stages in response to the compensation circuit control signal,

wherein the compensation circuit unit comprises a first transistor having a gate electrode and a first electrode connected to a first output terminal of the sensor circuit unit, and a second electrode connected to a compensation node of the compensation circuit unit.

2. The display device of claim 1 , wherein the sensor circuit unit includes one of a temperature sensor for sensing the internal and external environmental conditions, a current sensor for sensing current flowing through a Q node or a QB node of an N-th stage, and a voltage sensor for sensing a voltage of the Q node or the QB node of the N-th stage.

3. The display device of claim 1 , wherein the compensation circuit unit is configured to stably output a scan signal at a scan high voltage and a scan signal at a scan low voltage through output terminals of the plurality of stages.

4. The display device of claim 1 , wherein the compensation circuit unit is configured to correspond to circuits for controlling Q nodes or QB nodes of the plurality of stages or composed of a number of transistors less than the number of transistors constituting the circuits for controlling Q nodes or QB nodes.

5. The display device of claim 1 , wherein the compensation circuit unit further comprises:

a second transistor having a gate electrode connected to the compensation node, a first electrode connected to a low-level power line through which a low-level voltage is provided, and a second electrode connected to the Q node of the N-th stage;

a third transistor having a gate electrode connected to the Q node of the N-th stage, a first electrode connected to the low-level power line, and a second electrode connected to the compensation node; and

a fourth transistor having a gate electrode connected to the compensation node, a first electrode connected to the low-level power line, and a second electrode connected to an output terminal of the N-th stage.

6. The display device of claim 1 , wherein the compensation circuit unit further comprises:

a second transistor having a gate electrode connected to a second output terminal of the sensor circuit unit, a first electrode connected to a low-level power line through which a low-level voltage is provided, and a second electrode connected to the compensation node;

a third transistor having a gate electrode connected to the compensation node and a first electrode connected to an (N−1)-th clock signal line;

a fourth transistor having a gate electrode connected to a second electrode of the third transistor, a first electrode connected to an output terminal of an (N−1)-th stage, and a second electrode connected to the Q node of the N-th stage;

a fifth transistor having a gate electrode connected to the compensation node and a first electrode connected to an (N+2)-th clock signal line; and

a sixth transistor having a gate electrode connected to a second electrode of the fifth transistor, a first electrode connected to the low-level power line, and a second electrode connected to the output terminal of the N-th stage.

7. The display device of claim 1 , wherein the compensation circuit unit outputs the compensation signal when a compensation circuit control signal corresponding to a logic high is output from the sensor circuit unit, and does not output the compensation signal when a compensation circuit control signal corresponding to a logic low is output from the sensor circuit unit.

8. The display device of claim 1 , wherein the compensation circuit unit outputs the compensation signal to stabilize a low-level voltage when an on current of transistors of the shift register decreases according to a low-temperature operation.

9. A scan driver, comprising:

a level shifter;

a shift register including a plurality of stages to generate a scan signal on the basis of a signal and power output from the level shifter;

a sensor circuit unit configured to sense internal and external environmental conditions of the shift register and generate a compensation circuit control signal on the basis of a sensed result; and

a compensation circuit unit generating a compensation signal to compensate outputs of the plurality of stages in response to the compensation circuit control signal,

wherein the compensation circuit unit comprises a first transistor having a gate electrode and a first electrode connected to a first output terminal of the sensor circuit unit, and a second electrode connected to a compensation node of the compensation circuit unit.

10. The scan driver of claim 9 , wherein the sensor circuit unit includes one of a temperature sensor for sensing the internal and external environmental conditions, a current sensor for sensing current flowing through a Q node or a QB node of an N-th stage, and a voltage sensor for sensing a voltage of the Q node or the QB node of the N-th stage.

11. The scan driver of claim 9 , wherein the compensation circuit unit is configured to stably output a scan signal at a scan high voltage and a scan signal at a scan low voltage through output terminals of the plurality of stages.

12. The scan driver of claim 9 , wherein the compensation circuit unit is configured to correspond to circuits for controlling Q nodes or QB nodes of the plurality of stages or composed of a number of transistors less than the number of transistors constituting the circuits for controlling Q nodes or QB nodes.

13. The scan driver of claim 9 , wherein the compensation circuit unit further comprises:

a second transistor having a gate electrode connected to the compensation node, a first electrode connected to a low-level power line through which a low-level voltage is provided, and a second electrode connected to the Q node of the N-th stage;

a third transistor having a gate electrode connected to the Q node of the N-th stage, a first electrode connected to the low-level power line, and a second electrode connected to the compensation node; and

a fourth transistor having a gate electrode connected to the compensation node, a first electrode connected to the low-level power line, and a second electrode connected to an output terminal of the N-th stage.

14. The scan driver of claim 9 , wherein the compensation circuit unit further comprises:

a second transistor having a gate electrode connected to a second output terminal of the sensor circuit unit, a first electrode connected to a low-level power line through which a low-level voltage is provided, and a second electrode connected to the compensation node;

a third transistor having a gate electrode connected to the compensation node and a first electrode connected to an (N−1)-th clock signal line;

a fourth transistor having a gate electrode connected to a second electrode of the third transistor, a first electrode connected to an output terminal of an (N−1)-th stage, and a second electrode connected to the Q node of the N-th stage;

a fifth transistor having a gate electrode connected to the compensation node and a first electrode connected to an (N+2)-th clock signal line; and

a sixth transistor having a gate electrode connected to a second electrode of the fifth transistor, a first electrode connected to the low-level power line, and a second electrode connected to the output terminal of the N-th stage.

15. The scan driver of claim 9 , wherein the compensation circuit unit outputs the compensation signal when a compensation circuit control signal corresponding to a logic high is output from the sensor circuit unit, and does not output the compensation signal when a compensation circuit control signal corresponding to a logic low is output from the sensor circuit unit.

16. The scan driver of claim 9 , wherein the compensation circuit unit outputs the compensation signal to stabilize a low-level voltage when on current of transistors of the shift register decreases according to low-temperature operation.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 8, 2015
From: SHIM, DAHYE; CHOI, JOUNGMI; JANG, HYUNGUK
To: LG DISPLAY CO., LTD.
Reel/Frame 035803/0671 →
Priority Claims (1)
KR 10-2014-0072184 · Jun 13, 2014 · national
Continuity (1)
Related Publication 20150364078A1 · Dec 17, 2015