IP Library Granted Patent US 9,600,021
Granted Patent B2
US 9,600,021 · App. 13/900,544 · Granted Mar 21, 2017

Operating clock synchronization adjusting method for induction type power supply system

Inventors: Ming-Chiu Tsai (New Taipei, TW); Chi-Che Chan (New Taipei, TW)
Assignee: Fu Da Tong Technology Co., Ltd.
G06F1/12G06F1/324H02J50/10H04B5/0031H04B5/0037H04B5/0075
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Quick Facts
Patent No.
US 9,600,021
App. No.
13/900,544
Granted
Mar 21, 2017
Kind
B2
Abstract

An operating clock synchronization adjusting method, for an induction type power supply system, includes receiving a plurality of data pulses, by a supplying-end module, according to a clock of a microprocessor of the supplying-end module, for generating a plurality of data frames. A period between first data pulses corresponding to starting bits of a first detecting data frame and a second detecting frame among the plurality of data frame is calculated, for acquiring a data frame period. A period between the first data pulse of the second data frame and a second data pulse of the second data frame is calculated, for acquiring a bit period. The bit period and a bit time threshold are compared for determining whether to adjust the clock of the microprocessor according to the data frame period and a frame time threshold.

Claims (8)

1. An operating clock synchronization adjusting method, for an induction type power supply system, comprising:

receiving a plurality of data pulses, by a supplying-end module, according to a lock of a microprocessor of the supplying-end module, for generating a plurality of data frames;

calculating a period between first data pulses corresponding to starting bits of a first data frame and a second data frame among the plurality of data frames, for acquiring a data frame period;

calculating a period between the first data pulse of the second data frame and a second data pulse of the second data frame, for acquiring a bit period; and

comparing the bit period and a bit time threshold, for determining whether to adjust the clock of the microprocessor according to the data frame period and a frame time threshold.

2. The operating clock synchronization adjusting method of claim 1 , wherein the first data frame and the second data frame are continuous data frames of the plurality of data frames.

3. The operating clock synchronization adjusting method of claim 1 , wherein the step of comparing the bit period and the bit time threshold, for determining whether to adjust the clock of the microprocessor according to the data frame period and the frame time threshold comprises:

adjusting the clock of the microprocessor according to the data frame period and the frame time threshold when the bit period is within an error range of the bit time threshold.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2013
From: TSAI, MING-CHIU; CHAN, CHI-CHE
To: FU DA TONG TECHNOLOGY CO., LTD.
Reel/Frame 030470/0603 →
Priority Claims (3)
TW 100103836 A · Feb 1, 2011 · national
TW 101108610 A · Mar 14, 2012 · national
TW 102104223 A · Feb 4, 2013 · national
Continuity (3)
Continuation In Part 13488724 · Jun 5, 2012
Continuation In Part 13154965 · Jun 7, 2011
Related Publication 20130254570A1 · Sep 26, 2013