IP Library Granted Patent US 9,602,408
Granted Patent B2
US 9,602,408 · App. 14/144,320 · Granted Mar 21, 2017

General input/output architecture, protocol and related methods to implement flow control

Inventors: Jasmin Ajanovic (Portland, OR); David Harriman (Portland, OR); Blaise Fanning (Folsom, CA); David Lee (Portland, OR)
Assignee: Intel Corporation
H04L47/10G06F5/06G06F13/124G06F13/385G06F13/4059G06F13/42G06F13/4221G06F13/4252G06F13/4265G06F13/4269G06F13/4282
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Quick Facts
Patent No.
US 9,602,408
App. No.
14/144,320
Granted
Mar 21, 2017
Kind
B2
Abstract

An enhanced general input/output communication architecture, protocol and related methods are presented.

Claims (30)

1. An apparatus, comprising:

a protocol stack including layers to communicate data over an interconnect, wherein the protocol stack is implemented at least in part in hardware circuitry and the layers comprise a physical layer, a data link layer, and a transaction layer;

a transmitter to transmit data on a point to point interconnect; and

wherein the protocol stack is to assemble a plurality of messages, and at least one of the messages comprises a data link layer message to include a plurality of credits fields, each of the plurality of credits fields corresponds to a respective one of a plurality of credit counters and is to indicate a respective number of credits to be returned for the corresponding credit counter, and the data link layer message does not encapsulate a transaction layer packet.

2. The apparatus of claim 1 , wherein the data link layer message comprises a message frame.

3. The apparatus of claim 1 , wherein the interconnect includes a communication link.

4. The apparatus of claim 1 further comprising a transmitter which includes a particular counter to track a number of credits consumed.

5. The apparatus of claim 4 wherein the particular counter may track up to at least sixty-three credits.

6. The apparatus of claim 4 wherein the particular counter is set to zero upon initialization.

7. A method, comprising:

utilizing a protocol stack including layers to communicate data over an interconnect, wherein the layers comprise a physical layer, a data link layer, and a transaction layer;

utilizing a transmitter to transmit data on a point to point interconnect; and

utilizing the protocol stack to assemble a plurality of messages, wherein at least one of the messages comprises a data link layer message including a plurality of credits fields, each of the plurality of credits fields corresponds to a respective one of a plurality of credit counters and is to indicate a respective number of credits to be returned for the corresponding credit counter, and the data link layer message does not encapsulate a transaction layer packet.

8. The method of claim 7 further comprising utilizing a receiver to transmit information about a current memory space available to store data.

9. The method of claim 7 further comprising utilizing a transmitter which includes a particular counter to track a number of credits consumed.

10. The method of claim 9 further comprising resetting the particular counter to zero upon system reset.

11. The method of claim 7 further comprising refraining from sending packets from a transmitter to a receiver when a corresponding one of the credits fields has a value of zero therein.

12. The method of claim 7 wherein the messages are to achieve flow control of data between devices.

13. The method of claim 12 , wherein flow control is performed by the transaction layer in cooperation with the data link.

14. A non-transitory computer readable medium storing computer readable instructions for machine execution of a method for:

utilizing a protocol stack including layers to communicate data over an interconnect, wherein the layers comprise a physical layer, a data link layer, and a transaction layer;

utilizing a transmitter to transmit data on a point to point interconnect;

wherein the protocol stack including layers comprises a physical layer, a data link layer, and a transaction layer; and

utilizing the protocol stack to assemble a plurality of messages, wherein at least one of the messages comprises a data link layer message including a plurality of credits fields, each of the plurality of credits fields corresponds to a respective one of a plurality of credit counters and is to indicate a respective number of credits to be returned for the corresponding credit counter, and the data link layer message does not encapsulate a transaction layer packet.

15. The non-transitory computer readable medium of claim 14 , wherein the messages are communicated from a first device to a second device over the interconnect.

16. A system-on-a-chip (SoC) embedded within a mobile device, comprising:

a protocol stack including layers to communicate data over an interconnect, wherein the layers comprise a physical layer, a data link layer, and a transaction layer; and

a transmitter to transmit data on a point to point interconnect;

wherein the protocol stack is to assemble a plurality of messages, and at least one of the messages comprises a data link layer message to include a plurality of credits fields, each of the plurality of credits fields corresponds to a respective one of a plurality of credit counters and is to indicate a respective number of credits to be returned for the corresponding credit counter, and the data link layer message does not encapsulate a transaction layer packet.

17. The SoC of claim 16 further comprises a transmitter which includes a particular counter to track a number of credits consumed and a receiver to transmit information about a current memory space available to store data.

Continuity (5)
Continuation 13730024 · Dec 28, 2012
Continuation 12395497 · Feb 27, 2009
Continuation 10227601 · Aug 23, 2002
Provisional Application 60314708 · Aug 24, 2001
Related Publication 20140189174A1 · Jul 3, 2014