Wideband direct modulation with two-point injection in digital phase locked loops

1. A circuit comprising:

an oscillator circuit configured to receive a wrapped phase signal and a phase error signal at a modulation injection input and to generate responsively a modulated carrier signal;

a phase error measurement circuit connected to an output of the oscillator circuit, configured to generate a phase error measurement signal;

a loop filter configured to filter an error signal formed from the phase error measurement signal and the wrapped phase signal; and

a frequency divider controller connected to the phase error measurement circuit, configured to inject responsively a phase jump in the phase error measurement signal to offset a phase jump in the wrapped-phase input signal.

2. The circuit of claim 1 further comprising a delay circuit to delay the wrapped-phase input signal to align with the phase error measurement signal.

3. The apparatus of claim 2 , wherein the oscillator circuit comprises:

unwrap logic configured to generate an unwrapped-phase signal from the wrapped-phase input signal;

a differentiator connected to the unwrap logic to generate the differentiated unwrapped-phase signal;

addition logic configured to generate a frequency control signal by adding the phase error signal and the differentiated unwrapped-phase signal; and

an oscillator configured to generate the modulated carrier signal from the control signal.

4. The apparatus of claim 3 , wherein the unwrap logic is operative:

to select a phase offset from the group consisting of a positive phase offset, a negative phase offset, and zero phase offset; and

to add the phase offset to the wrapped-phase input signal.

5. The apparatus of claim 3 , wherein the wrapped-phase input signal, the unwrapped-phase signal, the error signal, and the control signal are digital signals.

6. The apparatus of claim 2 , further comprising a signal phase generator configured to generate a phase signal of a desired information-modulated transmit signal, the signal phase generator being coupled to the wrapped-phase input.

7. The apparatus of claim 2 , wherein the phase error measurement circuit comprises:

a frequency divider configured to divide the modulated carrier signal by a frequency divisor to generate a frequency-divided signal;

a reference oscillator configured to provide a cyclic reference signal;

a time-to-digital converter configured to compare a phase of the frequency-divided signal with a phase of a cyclic reference signal to generate the phase error measurement signal; and

addition logic configured to add the wrapped-phase input signal and the phase error measurement signal to generate the error signal.

8. The apparatus of claim 7 , wherein the loop filter is a proportional-integral filter.

9. The apparatus of claim 7 , further comprising:

a signal envelope generator configured to generate an envelope signal of a desired information-modulated transmit signal; and

an amplifier having:

a signal input connected to the oscillator output, and

a power control input configured to receive the envelope signal.

10. The apparatus of claim 1 , wherein the frequency divider controller, in response to a step with an absolute value greater than π in the wrapped-phase input signal, is operative to temporarily change the frequency divisor.

11. The apparatus of claim 10 , wherein, the frequency divider controller is operative, upon detecting a downward step of more than −π in the wrapped-phase input signal, to increase the frequency divisor by one, and upon detecting an upward step of more than +π in the wrapped-phase input signal, to decrease the frequency divisor by one.

12. An apparatus comprising:

an oscillator circuit configured to receive a wrapped phase signal and a phase error signal at a modulation injection input and connected to a feedback loop;

a phase error measurement circuit connected to the feedback loop, configured to generate a phase error measurement signal;

a loop filter configured to filter an error signal formed from the phase error measurement signal and the wrapped phase signal; and

a frequency divider controller connected to the phase error measurement circuit, configured to inject responsively a phase jump in the phase error measurement signal to offset a phase jump in the wrapped-phase input signal.

13. The circuit of claim 12 further comprising a digital delay circuit to delay the wrapped-phase input signal to align with the phase error measurement signal.

14. The circuit of claim 12 , wherein the phase jump has an absolute value of 2π.

15. A method comprising:

receiving a wrapped phase signal and a phase error signal at a modulation injection input and generating responsively a modulated carrier signal;

generating a phase error measurement signal from the modulated carrier signal;

generating the phase error signal by filtering an error signal formed from the phase error measurement signal and the wrapped phase signal; and

injecting responsively a phase jump in the phase measurement error signal to offset a phase jump in the wrapped-phase input signal.

16. The method of claim 15 , further comprising delaying the wrapped-phase input signal used in filtering the error signal.

17. The method of claim 15 , wherein the error signal is filtered by a proportional-integral filter.

18. The method of claim 15 , wherein generating a phase error measurement from the modulated carrier signal comprises:

dividing the modulated carrier signal by a frequency divisor to generate a frequency-divided signal;

comparing the phase of the frequency-divided signal with a phase of a cyclic reference signal to generate a measured phase signal; and

adding the wrapped-phase input signal to the measured phase signal to generate the error signal.

19. The method of claim 18 , wherein injecting responsively a phase jump comprises:

increasing the frequency divisor by one for one cycle of the cyclic reference signal in response to detecting a downward step of more than −π in the wrapped-phase input signal, and

decreasing the frequency divisor by one for one cycle of the cyclic reference signal, in response to detecting an upward step of more than +π in the wrapped-phase input signal.

20. The method of claim 15 , wherein generating responsively a modulated carrier signal comprises:

selecting a phase offset from the group consisting of a positive phase offset, a negative phase offset, and zero phase offset;

adding the phase offset to the wrapped-phase input to produce an unwrapped-phase signal;

generating a differentiated unwrapped-phase signal by taking a time differential of the unwrapped-phase signal;

adding the error signal to the differentiated unwrapped-phase signal.