IP Library › Granted Patent US 9,613,875
Granted Patent B2
US 9,613,875 · App. 15/194,107 · Granted Apr 4, 2017

Method and system for manufacturing semiconductor epitaxy structure

Inventors: Takashi Kobayashi (Hsinchu, TW); Po-Jung Lin (Hsinchu, TW); Che-Lin Chen (Tainan, TW); Bu-Chin Chung (Taipei, TW)
Assignee: HERMES-EPITEK CORP.
H01L22/26C23C16/22H01L21/0242H01L21/0254H01L21/02381H01L21/02458H01L21/67288
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Quick Facts
Patent No.
US 9,613,875
App. No.
15/194,107
Granted
Apr 4, 2017
Kind
B2
Abstract

A system for manufacturing semiconductor epitaxy structure includes a deposition apparatus, a curvature monitor system and a control unit. The deposition apparatus is configured for sequentially depositing a buffer layer, a first epitaxy layer, an insertion layer, a second epitaxy layer on a substrate. The curvature monitor system is configured for monitoring a curvature value of the semiconductor epitaxy structure. The control unit is configured for controlling the deposition apparatus to stop depositing the buffer layer, the first epitaxy layer, the insertion layer and the second epitaxy layer according to the curvature value of the semiconductor epitaxy structure measured by the curvature monitor system. The above-mentioned system for manufacturing semiconductor epitaxy structure is able to effectively control the strain of the semiconductor epitaxy structure during growth. A method for manufacturing semiconductor epitaxy structure is also disclosed.

Claims (11)

1. A system for manufacturing semiconductor epitaxy structure comprising:

a deposition apparatus, for sequentially depositing a buffer layer, a first epitaxy layer, an insertion layer, a second epitaxy layer on a substrate;

a curvature monitor system, for monitoring a curvature value of the semiconductor epitaxy structure; and

a control unit electrically connected with the deposition apparatus and the curvature monitor system, for controlling the deposition apparatus to stop depositing the buffer layer, the first epitaxy layer, the insertion layer and the second epitaxy layer according to the curvature value of the semiconductor epitaxy structure measured by the curvature monitor system.

2. The system for manufacturing semiconductor epitaxy structure according to claim 1 , wherein the insertion layer and the second epitaxy layer are repeatedly deposited by the deposition apparatus in an interlacing manner, and the curvature monitor system monitors the semiconductor epitaxy structure in real time to check if the curvature value of the semiconductor epitaxy structure has reached a predefined curvature value to determine whether stop depositing the insertion layer and the second epitaxy layer or not.

3. The system for manufacturing semiconductor epitaxy structure according to claim 1 , wherein the first epitaxy layer and the second epitaxy layer are the same material.

4. The system for manufacturing semiconductor epitaxy structure according to claim 1 , wherein the buffer layer and the insertion layer are the same material.

5. The system for manufacturing semiconductor epitaxy structure according to claim 1 , wherein the substrate is a silicon substrate or a sapphire substrate.

6. The system for manufacturing semiconductor epitaxy structure according to claim 1 , wherein the buffer layer comprises at least one of aluminum nitride and indium nitride.

7. The system for manufacturing semiconductor epitaxy structure according to claim 1 , wherein the insertion layer comprises at least one of aluminum nitride, aluminum gallium nitride, indium nitride and indium gallium nitride.

8. The system for manufacturing semiconductor epitaxy structure according to claim 1 , wherein the first epitaxy layer and the second epitaxy layer comprise gallium nitride.

Continuity (2)
Division 14754207 · Jun 29, 2015
Related Publication 20160379904A1 · Dec 29, 2016