IP Library Granted Patent US 9,618,361
Granted Patent B2
US 9,618,361 · App. 13/857,363 · Granted Apr 11, 2017

MEMS device automatic-gain control loop for mechanical amplitude drive

Inventors: Ion Opris (San Jose, CA); Hai Tao (Sunnyvale, CA); Shungneng Lee (Sunnyvale, CA)
Assignee: FAIRCHILD SEMICONDUCTOR CORPORATION
G01C25/00G01C19/5726
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Quick Facts
Patent No.
US 9,618,361
App. No.
13/857,363
Granted
Apr 11, 2017
Kind
B2
Abstract

This document discusses, among other things, apparatus and methods for digital automatic gain control for driving a MEMS device, such as a proof mass. In an example, an apparatus can include a driver configured to oscillate a proof mass of a MEMS device, a charge-to-voltage (C2V) converter configured to provide oscillation information of the proof mass, an analog-to-digital converter (ADC) configured to provide a digital representation of the oscillation information, and a digital, automatic gain control circuit to provide oscillation amplitude error information using a comparison of the oscillation information to target amplitude information, and to provide a digital drive command signal using an amplified representation of the oscillation amplitude error information.

Claims (38)

1. An apparatus comprising:

a driver configured to oscillate a proof mass of a MEMS gyroscope;

a charge-to-voltage (C2V) converter configured to receive a sense signal from a MEMS gyroscope and to provide oscillation information of the proof mass;

an analog-to-digital converter (ADC) configured to receive the oscillation information of the proof mass and to provide a digital representation of the oscillation information; and

a digital, automatic gain control circuit configured to receive the digital representation of the oscillation information, to provide oscillation amplitude error information using a comparison of the oscillation information to target amplitude information, and to provide a digital drive command signal using an amplified representation of the oscillation amplitude error information, the digital, automatic gain control circuit includes an output stage, the output stage including:

a fine gain register configured to provide a basic unit of change of the digital drive command signal;

a low pass filter; and

a coarse gain counter configured to increment on overshoot of the fine gain register, to decrement on undershoot of the fine gain register, and to provide a correction to the amplified representation of the oscillation amplitude error information.

2. The apparatus of claim 1 , wherein the ADC is configured to provide the digital representation of the sense signal using a single-bit data stream.

3. The apparatus of claim 2 , wherein the digital, automatic gain control circuit includes a down-sample module to receive the single-bit data stream and provide a second digital representation of the sense signal using a first multi-bit data stream.

4. The apparatus of claim 3 , wherein the digital, automatic gain control circuit includes a band pass filter configured to receive the first multi-bit data stream and provide a third digital representation of the sense signal using a second multi-bit data stream.

5. The apparatus of claim 4 , wherein the digital, automatic gain control circuit includes an amplitude detector configured to perform a square operation of the third digital representation of the sense signal to provide amplitude information of the sense signal.

6. The apparatus of claim 4 , wherein the digital, automatic gain control circuit includes a digital comparator configured to receive amplitude information and the target information and to provide the oscillation amplitude error information.

7. The apparatus of claim 6 , wherein the digital, automatic gain control circuit includes a finite impulse response filter configured to average the oscillation amplitude error information over a plurality of sample periods to provide a smoothed error signal.

8. The apparatus of claim 1 , wherein the ADC includes a band-pass, delta-sigma ADC.

9. The apparatus of claim 1 , including a digital-to-analog converter configured to receive at least a portion of the digital drive command signal and to provide an analog command signal to the driver.

10. A method comprising:

oscillating a proof mass of a MEMS gyroscope using a driver;

receiving oscillation information of the proof mass using a charge-to-voltage converter;

providing a digital representation of the oscillation information using an analog to digital converter;

providing oscillation amplitude error information using a comparison of the oscillation information to target amplitude information, and a digital automatic gain control circuit;

providing a digital drive command signal using the oscillation amplitude error information and the digital automatic gain control circuit;

receiving an amplified representation of the oscillation amplitude error information at an output stage of the digital automatic gain control circuit;

processing the amplified representation of the oscillation amplitude error information using a digital limiter and one or more digital up-samplers to provide a fine portion of the digital drive command signal; and

processing the amplified representation of the oscillation amplitude error information using a low pass filter and a gain control counter to provide a coarse portion of the digital drive command signal.

11. The method of claim 10 , wherein providing a digital representation includes providing a digital representation of the oscillation information using a using a single-bit data stream.

12. The method of claim 11 , including down-sampling the single-bit data stream to provide a second digital representation of the oscillation information using a multi-bit data stream.

13. The method of claim 12 , including processing the first multi-bit data stream using a band-pass filter to provide a third digital representation of the oscillation information.

14. The method of claim 13 , including:

receiving the third digital representation of the oscillation information at a amplitude detector of the digital automatic gain control circuit; and

providing amplitude information of the oscillation information using the amplitude detector.

15. The method of claim 14 , including comparing the amplitude information to the target information to provide the oscillation amplitude error information using a digital comparator of the digital automatic gain control circuit.

16. The method of claim 15 , including averaging the oscillation amplitude error information over a predetermined number of samples using a finite impulse response filter to provide a smoothed error signal.

17. The method of claim 10 , including converting the digital, drive command signal to an analog, drive command signal using an digital-to-analog converter; and

receiving the analog command signal at the driver.

18. The method of claim 10 , wherein processing the amplified representation of the oscillation amplitude error information using a low pass filter and a gain control counter includes incrementing the gain control counter when the low pass filter overshoots; and

decrementing the gain control counter when the low pass filter undershoots.

19. The method of claim 10 , wherein processing the amplified representation of the oscillation amplitude error information using a low pass filter and a gain control counter includes feeding back a correction to the amplified representation of the oscillation amplitude error information when a value of the gain control counter changes.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 058871, FRAME 0799 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 065653/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 040075, FRAME 0644 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0536 →
SECURITY INTEREST Recorded Nov 12, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 058871/0799 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2021
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 057969/0206 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2021
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 057694/0374 →
PATENT SECURITY AGREEMENT Recorded Sep 19, 2016
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 040075/0644 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 14, 2014
From: OPRIS, ION; TAO, HAI; LEE, SHUNGNENG
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 032665/0170 →
Continuity (2)
Provisional Application 61620641 · Apr 5, 2012
Related Publication 20130268227A1 · Oct 10, 2013