Method of making a semiconductor device having a functional capping
A wafer level method of making a micro-electronic and/or micro-mechanic device, having a capping with electrical wafer through connections (vias), comprising the steps of providing a first wafer of a semiconductor material having a first and a second side and a plurality of holes and/or recesses in the first side, and a barrier structure extending over the wafer on the second side, said barrier comprising an inner layer an insulating material, such as oxide, and an outer layer of another material. Then, metal is applied in said holes so as to cover the walls in the holes and the bottom of the holes. The barrier structure is removed and contacts are provided to the wafer through connections on the back-side of the wafer. Bonding structures are provided on either of said first side or the second side of the wafer. The wafer is bonded to another wafer carrying electronic and micro-electronic/mechanic components, such that the first wafer forms a capping structure covering the second wafer. Finally the wafer is singulated to individual devices.
1. Capping substrate for a semiconductor device, comprising a passive integrated component which is an inductance comprising a metal core and a winding comprising a combination of a plurality of via structures ( 11 ), arranged in arrays and extending through a substrate, and metal strips ( 12 ) which connect the via structures pair-wise;
wherein a first via located on one side of the metal core is coupled on the upper surface by at least one metal strip to an opposing via on the opposite side of the metal core and wherein said opposing via is interconnected on a bottom surface of the substrate by at least one metal strip with a second via adjacent to the first via, such that there is essentiallya continuous formation extending between and coupling the vias, thereby producing a conductor around the metal core;
wherein said via structures are coaxial metal through connections comprising at least one insulated metal through connection extending through the substrate; at least one annular metal structure circumferentially surrounding said insulated metal through connection, and located at a finite radial distance therefrom.
2. Capping structure as claimed in claim 1 , wherein the inductance is provided by an elongated metal core extending in the substrate and through it.
3. Capping structure as claimed in claim 2 , wherein said core extends through the substrate thickness, and has an elongated shape, extending essentially in the plane of the substrate.
4. Capping structure as claimed in claim 2 , wherein said core is made of Ni or a Ni/Co alloy.
5. Capping structure as claimed in claim 1 , wherein there are double arrays of vias arranged in a staggered configuration.
6. Capping structure as claimed in claim 1 , wherein there are triple or quadruple arrays of vias.
7. A micro-electronic and/or micro-mechanic device having a capping structure as claimed in claim 1 .
8. The device as claimed in claim 7 which is a MEMS and/or CMOS device.