Resistive random access memory (RRAM) cell with a composite capping layer
A resistive random access memory (RRAM) cell with a composite capping layer is provided. A tantalum oxide based layer is arranged over a bottom electrode layer. The composite capping layer is arranged over and abutting the tantalum oxide based layer. The composite capping layer includes a first metal layer and a second metal layer overlying the first metal layer. The first metal layer is more reactive with the tantalum oxide based layer than the second metal layer. A top electrode layer is arranged over the composite capping layer. A method for manufacturing the RRAM cell is also provided.
1. A resistive random access memory (RRAM) cell comprising:
a bottom electrode layer;
a tantalum oxide based layer arranged over the bottom electrode layer;
a composite capping layer arranged over and abutting the tantalum oxide based layer, wherein the composite capping layer includes a first metal layer and a second metal layer overlying the first metal layer, wherein the first and second metal layers are elemental metals configured to store oxygen from the tantalum oxide based layer, and wherein the first metal layer is more reactive with the tantalum oxide based layer than the second metal layer; and
a top electrode layer arranged over the composite capping layer, wherein the top electrode layer and the composite capping layer share a first width, and wherein the tantalum oxide based layer and the bottom electrode layer share a second width greater than the first width.
2. The RRAM cell according to claim 1 , wherein the first metal layer includes hafnium, titanium, zirconium, or lanthanum.
3. The RRAM cell according to claim 1 , wherein the second metal layer includes tantalum, aluminum, tungsten, ruthenium, or platinum.
4. The RRAM cell according to claim 1 , wherein the first metal layer has a lesser thickness than the second metal layer.
5. The RRAM cell according to claim 4 , wherein the first metal layer has a thickness less than about 70 angstroms.
6. The RRAM cell according to claim 1 , wherein the first metal layer has a thickness of about 10-40 angstroms, and wherein the second metal layer has a thickness of about 75-150 angstroms.
7. The RRAM cell according to claim 1 , wherein the tantalum oxide based layer includes tantalum, oxygen, and at least one other element.
8. The RRAM cell according to claim 1 , wherein the tantalum oxide based layer is bisected into an upper region and a lower region having a higher oxygen concentration than the upper region, and wherein the RRAM cell further includes:
a data storage region comprising the lower region, and configured to vary in resistance in response to external electric fields; and
an ion reservoir region including the first metal layer and the upper region, and configured to store oxygen ions from the data storage region.
9. The RRAM cell according to claim 1 , wherein the composite capping layer has a lower concentration of oxygen than the tantalum oxide based layer, and is configured to extract oxygen from the tantalum oxide based layer.
10. The RRAM cell according to claim 1 , wherein the tantalum oxide based layer contacts a top surface of the bottom electrode layer, the first metal layer contacts a top surface of the tantalum oxide based layer, the second metal layer contacts a top surface of the first metal layer, the top electrode layer contacts a top surface of the second metal layer, and a via contacts a top surface of the bottom electrode layer.
11. An integrated circuit (IC) with a resistive random access memory (RRAM) cell, the IC comprising:
a bottom interconnect structure comprising a bottom interlayer dielectric (ILD) layer and a bottom metallization layer;
a bottom electrode layer overlying the bottom interconnect structure and electrically connected to the bottom metallization layer;
a tantalum oxide based layer arranged over the bottom electrode layer, wherein the tantalum oxide based layer comprises an upper region and a lower region having a higher oxygen concentration than the upper region;
a composite capping layer arranged over and abutting the tantalum oxide based layer, wherein the composite capping layer includes a first metal layer and a second metal layer overlying the first metal layer, and wherein the first metal layer is more reactive with the tantalum oxide based layer than the second metal layer;
a top electrode layer arranged over the composite capping layer, wherein sidewalls of the to electrode layer are aligned with sidewalls of the composite capping layer, wherein sidewalls of the tantalum oxide based layer are aligned with sidewalls of the bottom electrode layer, wherein the top electrode layer and the composite capping layer share a first width, and wherein the tantalum oxide based layer and the bottom electrode layer share a second width greater than the first width;
a top interconnect structure comprising a top ILD layer and a top metallization layer, wherein the top ILD layer is arranged over the bottom ILD layer, and wherein the top metallization layer is arranged in the top ILD layer and electrically connected to the top electrode layer;
a data storage region comprising the lower region, and configured to vary in resistance in response to external electric fields; and
an ion reservoir region including the first metal layer and the upper region, and configured to store oxygen ions from the data storage region.
12. The IC according to claim 11 , wherein the first metal layer includes hafnium, titanium, zirconium, or lanthanum, and wherein the second metal layer includes tantalum, aluminum, tungsten, ruthenium, or platinum.
13. The IC according to claim 11 , wherein the first metal layer has a smaller thickness than the second metal layer.
14. The IC according to claim 11 , wherein the composite capping layer has a lower concentration of oxygen than the tantalum oxide based layer, and is configured to extract oxygen from the tantalum oxide based layer.
15. The IC according to claim 11 , wherein a via extends from the top metallization layer to the top electrode layer.
16. The IC according to claim 15 , wherein the tantalum oxide based layer contacts a top surface of the bottom electrode layer, the first metal layer contacts a top surface of the tantalum oxide based layer, the second metal layer contacts a top surface of the first metal layer, the top electrode layer contacts a top surface of the second metal layer, and the via contacts a top surface of the bottom electrode layer.
17. A resistive random access memory (RRAM) cell comprising:
a bottom electrode layer arranged over a diffusion barrier layer;
a tantalum oxide based layer arranged over the bottom electrode layer, wherein sidewalls of the tantalum oxide based layer are aligned with sidewalls of the diffusion barrier and bottom electrode layers, and wherein the tantalum oxide based layer shares a first width with the diffusion barrier and bottom electrode layers;
a first metal layer arranged over and contacting the tantalum oxide based layer;
a second metal layer arranged over and contacting the first metal layer, wherein a material of the second metal layer is less reactive with a material of the tantalum oxide based layer than a material of the first metal layer; and
a top electrode layer arranged over and contacting the second metal layer, wherein sidewalls of the top electrode layer are aligned with sidewalls of the first and second metal layers, wherein the top electrode layer shares a second width with the first and second metal layers, and wherein the second width is less than the first width.