Ensuring imaging subsystem integrity in camera based safety systems
A method for testing an imaging subsystem of a system-on-a-chip (SOC) is provided that includes executing imaging subsystem test software instructions periodically on a processor of the SOC, receiving reference image data in the imaging subsystem responsive to the executing of the test software instructions, performing image signal processing on the reference image data by the imaging subsystem to generate processed reference image data, and using the processed reference image data by the test software instructions to verify whether or not the imaging subsystem is operating correctly.
1. A method for testing an imaging subsystem of a system-on a-chip (SOC), the method comprising:
executing imaging subsystem test software instructions, stored in an on-chip memory of the SOC, periodically on a processor of the SOC;
receiving reference image data in the imaging subsystem responsive to the executing of the test software instructions;
performing image signal processing on the reference image data by the imaging subsystem to generate processed reference image data; and
using the processed reference image data by the test software instructions to verify whether or not the imaging subsystem is operating correctly, in which executing imaging subsystem test software instructions periodically includes executing the imaging subsystem test software instructions at fault tolerant time intervals;
in which using the processed reference image data includes computing a cyclic redundancy check (CRC) value for the processed reference image data and comparing the computed CRC value to an expected CRC value.
2. The method of claim 1 , in which executing imaging subsystem test software instructions is performed responsive to a timer interrupt.
3. The method of claim 1 , in which the reference image data is a single test frame.
4. The method of claim 1 , in which the processor is an image processing unit.
5. The method of claim 1 , in which the SOC is operating in a driver assistance system.
6. A camera based system-on-a-chip (SOC) comprising:
an on-chip memory storing test software instructions;
a processor coupled to the memory to periodically execute the test software instructions to verify correct operation of an imaging subsystem, in which processed reference image data generated by the imaging subsystem is used; and
the imaging subsystem coupled to the processor in which, responsive to execution of the test software instructions, reference image data is received and processed to generate the processed reference image data, in which the processor executes the test software instructions periodically at fault tolerant time intervals;
in which the test software instructions compare a computed cyclic redundancy check (CRC) value for the processed reference image data to an expected CRC value to verify whether or not the imaging system is operating correctly.
7. The camera based SOC of claim 6 , in which the processor executes the test software instructions responsive to a timer interrupt.
8. The camera based SOC of claim 6 , in which the reference image data is a single test frame.
9. The camera based SOC of claim 6 , in which the processor is an image processing unit.
10. The camera based SOC of claim 6 , in which the SOC is included in a driver assistance system.
11. A non-transitory computer readable medium storing test software instructions that cause a method for testing an imaging subsystem of a camera based SOC to be performed, the method comprising:
executing test software instructions, stored in an on-chip memory of the SOC, periodically on a processor of the SOC;
receiving reference image data in the imaging subsystem responsive to the executing of the test software instructions;
performing image signal processing on the reference image data by the imaging subsystem to generate processed reference image data; and
using the processed reference image data by the test software instructions to verify whether or not the imaging subsystem is operating correctly, in which the imaging subsystem test software instructions are executed periodically at fault tolerant time intervals;
in which using the processed reference image data includes computing a cyclic redundancy check (CRC) value for the processed reference image data and comparing the computed CRC value to an expected CRC value.
12. The non-transitory computer readable medium of claim 11 , in which the imaging subsystem test software instructions are executed responsive to a timer interrupt.
13. The non-transitory computer readable medium of claim 11 , in which the reference image data is a single test frame.
14. The non-transitory computer readable medium of claim 11 , in which the processor is an image processing unit.
15. A method for testing an imaging subsystem of a system-on a-chip (SOC), the method comprising:
executing imaging subsystem test software instructions, stored in an on-chip memory of the SOC, on a processor of the SOC periodically at fault tolerant time intervals;
receiving reference image data, from a non-volatile memory on the SOC, in the imaging subsystem responsive to the executing of the test software instructions;
performing image signal processing on the reference image data by the imaging subsystem to generate processed reference image data; and
computing a cyclic redundancy check (CRC) value for the processed reference image data and comparing the computed CRC value to an expected CRC value to verify whether or not the imaging system is operating correctly.
16. The method of claim 15 , in which the SOC is operating in a driver assistance system.
17. The method of claim 15 , in which the reference image data is a single test frame.