IP Library › Granted Patent US 9,632,559
Granted Patent B2
US 9,632,559 · App. 15/137,184 · Granted Apr 25, 2017

Delaying execution in a processor to increase power savings

Inventors: Pradip Bose (Yorktown Heights, NY); Alper Buyuktosunoglu (White Plains, NY); Hans M. Jacobson (White Plains, NY); Augusto J. Vega (Astoria, NY)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
G06F1/324G06F1/329G06F1/3228G06F1/3287G06F1/3296Y02B60/1217Y02B60/1285Y02B60/144
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Quick Facts
Patent No.
US 9,632,559
App. No.
15/137,184
Granted
Apr 25, 2017
Kind
B2
Abstract

Embodiments relate to storing data in memory. An aspect includes applying a power savings technique to at least a subset of a processor. Pending work items scheduled to be executed by the processor are monitored. The pending work items are grouped based on the power savings technique. The grouping includes delaying a scheduled execution time of at least one of the pending work items to increase an overall number of clock cycles that the power savings technique is applied to the processor. It is determined that an execution criteria has been met. The pending work items are executed based on the execution criteria being met and the grouping.

Claims (46)

1. A computer implemented method comprising:

applying a power savings technique to at least a subset of a processor;

monitoring pending work items scheduled to be executed by the processor;

grouping the pending work items based on the power savings technique, the grouping including delaying a scheduled execution time of at least one of the pending work items to increase an overall number of clock cycles that the power savings technique is applied to the processor;

determining that an execution criteria has been met; and

executing the pending work items based on the execution criteria being met and the grouping, wherein:

the power savings technique is power gating,

the pending work items are off-chip memory requests located in a queue,

the executing includes a burst of contents of the queue to an off-chip memory, the off-chip memory connected to the memory controller via a memory link,

the power savings technique is applied to at least one of the processor, a memory located on the processor, the memory link, and the off-chip memory, and

the execution criteria includes at least one of:

a number of pending working items in the queue exceeds a threshold number of pending work items and

a number of cycles since a last burst is longer than a threshold amount of time.

2. The method of claim 1 , further comprising deactivating the power savings technique based on the execution criteria being met.

3. The method of claim 1 , wherein the at least one of the pending work items is a non-critical pending work item.

4. A system comprising a processor, the system configured to perform a method comprising:

applying a power savings technique to at least a subset of a processor;

monitoring pending work items scheduled to be executed by the processor;

grouping the pending work items based on the power savings technique, the grouping including delaying a scheduled execution time of at least one of the pending work items to increase an overall number of clock cycles that the power savings technique is applied to the processor;

determining that an execution criteria has been met; and

executing the pending work items based on the execution criteria being met and the grouping, wherein:

the power savings technique is power gating,

the pending work items are off-chip memory requests located in a queue,

the executing includes a burst of contents of the queue to an off-chip memory, the off-chip memory connected to the memory controller via a memory link,

the power savings technique is applied to at least one of the processor, a memory located on the processor, the memory link, and the off-chip memory, and

the execution criteria includes at least one of:

a number of pending working items in the queue exceeds a threshold number of pending work items and

a number of cycles since a last burst is longer than a threshold amount of time.

5. The system of claim 4 , wherein the system is further configured to deactivate the power savings technique based on the execution criteria being met.

6. The system of claim 4 , wherein the at least one of the pending work items is a non-critical pending work item.

7. A computer program product comprising:

a computer readable storage medium having program instructions embodied therewith, the program instructions readable by a processing circuit to cause the processing circuit to perform a method comprising:

applying a power savings technique to at least a subset of a processor;

monitoring pending work items scheduled to be executed by the processor;

grouping the pending work items based on the power savings technique, the grouping including delaying a scheduled execution time of at least one of the pending work items to increase an overall number of clock cycles that the power savings technique is applied to the processor;

determining that an execution criteria has been met; and

executing the pending work items based on the execution criteria being met and the grouping, wherein:

the power savings technique is power gating,

the pending work items are off-chip memory requests located in a queue,

the executing includes a burst of contents of the queue to an off-chip memory, the off-chip memory connected to the memory controller via a memory link,

the power savings technique is applied to at least one of the processor, a memory located on the processor, the memory link, and the off-chip memory, and

the execution criteria includes at least one of:

a number of pending working items in the queue exceeds a threshold number of pending work items and

a number of cycles since a last burst is longer than a threshold amount of time.

8. The computer program product of claim 7 , wherein the program instructions further cause the processing circuit to deactivate the power savings based on the execution criteria being met.

9. The computer program product of claim 7 , wherein the at least one of the pending work items is a non-critical pending work item.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2026
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: KIDON IP CORPORATION
Reel/Frame 074125/0530 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2026
From: KIDON IP CORPORATION
To: CAPROCK INTEGRATED TECHNOLOGIES LLC
Reel/Frame 073866/0504 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2026
From: INTERNATIONAL BUSINESS MACHINES CORPORATION
To: KIDON IP CORPORATION
Reel/Frame 074975/0477 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 25, 2016
From: BOSE, PRADIP; BUYUKTOSUNOGLU, ALPER; JACOBSON, HANS M.; VEGA, AUGUSTO J.
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 038366/0742 →
Continuity (2)
Continuation 14245301 · Apr 4, 2014
Related Publication 20160239077A1 · Aug 18, 2016