IP Library Granted Patent US 9,634,111
Granted Patent B2
US 9,634,111 · App. 14/396,507 · Granted Apr 25, 2017

Passivation technique for wide bandgap semiconductor devices

Inventors: Feng Gao (Cambridge, MA); Di Chen (Cambridge, MA); Bin Lu (Boston, MA); Tomas Apostol Palacios (Belmont, MA)
Assignee: Massachusetts Institute of Technology
H01L29/66462H01L23/3171H01L23/3192H01L29/2003H01L29/778H01L2924/0002
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Quick Facts
Patent No.
US 9,634,111
App. No.
14/396,507
Granted
Apr 25, 2017
Kind
B2
Abstract

A method of protecting a semiconductor structure from water and a semiconductor structure formed by the method. The semiconductor structure includes a wide-bandgap semiconductor material in which at least one semiconductor device is formed. The method includes heating the semiconductor structure in a vacuum to a temperature of at least 200° C. to remove water from the semiconductor structure. The method also includes, after the heating of the semiconductor structure, forming a layer comprising a hydrophobic material over the semiconductor structure. The semiconductor structure is kept in the vacuum between the heating of the semiconductor structure and the forming of the layer comprising the hydrophobic material.

Claims (24)

1. A method of protecting a semiconductor structure from water, the semiconductor structure comprising a wide-bandgap semiconductor material in which at least one semiconductor device is formed, the method comprising:

heating the semiconductor structure in a vacuum to a temperature of at least 200° C. to remove water from the semiconductor structure; and

after the heating of the semiconductor structure, forming a layer comprising a hydrophobic material over the semiconductor structure, wherein the semiconductor structure is kept in the vacuum between the heating of the semiconductor structure and the forming of the layer comprising the hydrophobic material.

2. The method of claim 1 , wherein the wide-bandgap semiconductor material comprises a III-V nitride semiconductor material.

3. The method of claim 2 , wherein the III-V nitride semiconductor material comprises an Al x In y Ga z N material in which one or more of x, y and z is greater than zero.

4. The method of claim 1 , wherein the vacuum has a pressure of 1×10 −3 torr or lower.

5. The method of claim 1 , wherein the heating of the semiconductor structure is performed in a first vacuum chamber and the forming of the layer comprising a hydrophobic material is performed in the first vacuum chamber or a second vacuum chamber.

6. The method of claim 1 , wherein the hydrophobic material has a water contact angle larger than 90°.

7. The method of claim 1 , wherein the hydrophobic material has a surface free energy less than 100 milli-joule per meter squared (mJ/m 2 ).

8. The method of claim 1 , wherein the hydrophobic material has a dielectric constant less than 12.

9. The method of claim 1 , wherein the hydrophobic material includes at least one material selected from the group consisting of polytetrafluoroethylene (PTFE), polymethylmethacrylate (PMMA), benzocyclobutene (BCB), polyethylene, parylene and a self-assembled monolayer (SAM).

10. The method of claim 1 , further comprising forming a dielectric layer, wherein the layer comprising the hydrophobic material is formed over the dielectric layer.

11. The method of claim 10 , wherein the semiconductor device comprises a transistor and the dielectric layer is formed underneath a gate of the transistor.

12. The method of claim 10 , further comprising forming a second dielectric layer and/or a passivation layer over the layer comprising the hydrophobic material.

13. The method of claim 1 , further comprising forming a dielectric layer and/or a passivation layer over the layer comprising the hydrophobic material.

14. The method of claim 1 , further comprising increasing a surface roughness of the layer comprising the hydrophobic material.

15. The method of claim 14 , wherein the surface roughness of the layer is increased such that the layer has a water contact angle larger than 150°.

16. The method of claim 1 , further comprising increasing a surface roughness of the semiconductor structure prior to forming the layer comprising the hydrophobic material.

17. The method of claim 1 , further comprising packaging the semiconductor structure in an environment having less than 30% relative humidity.

18. The method of claim 17 , wherein packaging the semiconductor structure comprises packaging the semiconductor structure in a vacuum.

19. A semiconductor structure comprising a wide-bandgap semiconductor material in which at least one semiconductor device is formed, the semiconductor structure being formed by a method comprising:

heating the semiconductor structure in a vacuum to a temperature of at least 200° C. to remove water from the semiconductor structure; and

after the heating of the semiconductor structure, forming a layer comprising a hydrophobic material over the semiconductor structure, wherein the semiconductor structure is kept in the vacuum between the heating of the semiconductor structure and the forming of the layer comprising the hydrophobic material.

20. The semiconductor structure of claim 19 , wherein the hydrophobic material includes at least one material selected from the group consisting of polytetrafluoroethylene (PTFE), polymethylmethacrylate (PMMA), benzocyclobutene (BCB), polyethylene, parylene and a self-assembled monolayer (SAM).

Assignments (2)
CONFIRMATORY LICENSE Recorded Aug 28, 2015
From: MIT
To: NAVY, SECRETARY OF THE UNITED STATES OF AMERICA
Reel/Frame 036551/0080 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2014
From: GAO, FENG; CHEN, DI; LU, BIN; PALACIOS, TOMAS APOSTOL
To: MASSACHUSETTS INSTITUTE OF TECHNOLOGY
Reel/Frame 034607/0111 →
Continuity (2)
Provisional Application 61636787 · Apr 23, 2012
Related Publication 20150091061A1 · Apr 2, 2015