Semiconductor devices and methods of fabricating the same

1. A semiconductor device comprising:

a fin disposed on a substrate, the fin including an insulating layer pattern disposed in a top portion of the fin, and the insulating layer pattern including an oxide material;

a field insulating layer being on the substrate and covering sidewalls of the fin, a thickness of the field insulating layer being greater than a thickness of the insulating layer pattern;

a wire pattern disposed on the insulating layer pattern to be separated from the insulating layer pattern;

a gate electrode surrounding the wire pattern;

a gate insulating layer between the wire pattern and the gate electrode and between the gate electrode and the insulating layer pattern, the gate insulating layer contacting the insulating layer pattern;

source/drain regions on both sides of the gate electrode, wherein the source/drain regions are connected to the wire pattern, wherein the source/drain regions comprise respective epitaxial layers disposed on a top surface of the fin, and the epitaxial layers comprise respective first portions and respective second portions, and wherein the wire pattern is disposed between the first portions, and the gate electrode is disposed between the second portions; and

an epitaxial seed film which comprises a first portion disposed between one of the source/drain regions and the top surface of the fin and a second portion disposed between the one of the source/drain regions and the wire pattern, wherein the epitaxial seed film and the epitaxial layer comprise different materials.

2. A semiconductor device comprising:

a field insulating layer which is disposed on a substrate and comprises an opening having long sides extending along a first direction and short sides extending along a second direction different from the first direction;

a first insulating layer pattern which is disposed on the substrate and has long sides extending along the first direction and short sides extending along the second direction, the long sides of the first insulating layer pattern contacting the long sides of the opening, respectively, a thickness of the first insulating layer pattern being smaller than a thickness of the field insulating layer, and the first insulating layer pattern including an oxide material;

a first wire pattern which is disposed on the first insulating layer pattern to be separated from the first insulating layer pattern and extends along the first direction;

a first gate electrode disposed on the field insulating layer and the first insulating layer pattern to surround the first wire pattern;

a gate insulating layer between the first wire pattern and the first gate electrode and between the first insulating layer pattern and the first gate electrode, the gate insulating layer contacting the first insulating layer pattern;

a second insulating layer pattern which is disposed on the substrate and has long sides extending along the first direction and short sides extending along the second direction;

a second wire pattern which is disposed on the second insulating layer pattern to be separated from the second insulating layer pattern and extends along the first direction;

a second gate electrode which is disposed on the field insulating layer and the second insulating layer pattern to surround the second wire pattern;

source/drain regions which are connected to the first wire pattern and the second wire pattern, wherein the long sides of the second insulating layer pattern contact the long sides of the opening; and

a semiconductor pattern which protrudes from the substrate and is disposed in the opening, wherein the semiconductor pattern comprises a first portion and second portions disposed on both sides of the first portion in the first direction,

wherein the first insulating layer pattern and the second insulating layer pattern are respectively disposed on the second portions of the semiconductor pattern, and each of the source/drain regions is located on the first portion of the semiconductor pattern.

3. The semiconductor device of claim 2 , wherein a top surface of the first insulating layer pattern protrudes further upward than a top surface of the field insulating layer.