IP Library › Granted Patent US 9,640,439
Granted Patent B2
US 9,640,439 · App. 14/690,044 · Granted May 2, 2017

Semiconductor device, related manufacturing method, and related electronic device

Inventor: Jianhua Xu (Shanghai, CN)
Assignee: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
H01L21/82345H01L21/02532H01L21/02592H01L21/28088H01L21/28568H01L21/76841H01L21/823456H01L21/823842H01L29/4966H01L29/66545H01L21/76846H01L22/12H01L22/20
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Quick Facts
Patent No.
US 9,640,439
App. No.
14/690,044
Granted
May 2, 2017
Kind
B2
Abstract

A method for manufacturing a semiconductor device may include the following steps: providing a semiconductor substrate structure; providing a substrate-connecting barrier layer on the semiconductor substrate structure; performing one or more iterations of a composite-layer formation process to provide a gate-connecting barrier layer, wherein the composite-layer formation process comprises: applying a silicon-containing compound set to an outmost existing barrier layer to form an amorphous silicon layer, and forming an overlying barrier layer on the amorphous silicon layer, wherein the substrate-connecting barrier layer is the outmost existing barrier layer for a first iteration of the one or more iterations, and wherein the gate-connecting barrier layer is the overlying barrier layer resulted from a last iteration of the one or more iterations; and providing a conductive gate layer on the gate-connecting barrier layer.

Claims (29)

1. A method for manufacturing a semiconductor device, the method comprising:

providing a semiconductor substrate structure;

providing a substrate-connecting barrier layer on the semiconductor substrate structure;

performing one or more iterations of a composite-layer formation process to provide a gate-connecting barrier layer, wherein the composite-layer formation process comprises: applying a silicon-containing compound set to an outmost existing barrier layer to form an amorphous silicon layer, and forming an overlying barrier layer on the amorphous silicon layer, wherein the substrate-connecting barrier layer is the outmost existing barrier layer for a first iteration of the one or more iterations, and wherein the gate-connecting barrier layer is the overlying barrier layer resulted from a last iteration of the one or more iterations; and

providing a conductive gate layer on the gate-connecting barrier layer, wherein a first silicon-containing compound set is applied to the substrate-connecting barrier layer to form a first amorphous silicon layer, wherein a first overlying barrier layer is formed on the first amorphous silicon layer, wherein a second silicon-containing compound set is applied to the first overlying barrier layer to form a second amorphous silicon layer, and wherein the second amorphous silicon layer is positioned between the first amorphous silicon layer and the gate-connecting barrier layer after the gate-connecting barrier layer has been formed.

2. The method of claim 1 , wherein a material of the substrate-connecting barrier layer is same as a material of the gate-connecting barrier layer.

3. The method of claim 1 , wherein the silicon-containing compound set includes a silicon hydride.

4. The method of claim 1 , wherein the silicon-containing compound set includes silane.

5. The method of claim 1 , wherein the composite-layer formation process is performed only once to obtain the gate-connecting barrier layer.

6. The method of claim 1 wherein at least two iterations of the composite-layer formation process are performed to obtain the gate-connecting barrier layer.

7. The method of claim 1 , further comprising: determining a number of the iterations based on a predetermined target height of the gate-connecting barrier layer.

8. The method of claim 1 , further comprising:

monitoring a height of the overlying barrier layer; and

designating the overlying barrier layer as the gate-connecting barrier layer if the height of the overlying layer reaches a predetermined value.

9. The method of claim 1 , wherein a thickness of the substrate-connecting barrier layer is greater than or equal to a half of a target height of the gate-connecting barrier layer with respect to the semiconductor substrate structure.

10. The method of claim 1 , wherein the silicon-containing compound set is applied to the outmost existing barrier layer for a time length in a range of 5 seconds to 60 seconds for each of the one or more iterations.

11. The method of claim 1 , wherein a thickness of the substrate-connecting barrier layer in a direction is unequal to a thickness of the gate-connecting barrier layer in the direction.

12. The method of claim 1 , wherein a thickness of the substrate-connecting barrier layer in a direction is unequal to a thickness of the first overlying barrier layer in the direction.

13. The method of claim 1 , wherein a thickness of the first overlying barrier layer in a direction is unequal to a thickness of the gate-connecting barrier layer in the direction.

14. A method for manufacturing a semiconductor device, the method comprising:

providing a semiconductor substrate structure;

providing a substrate-connecting barrier layer on the semiconductor substrate structure;

performing one or more iterations of a composite-layer formation process to provide a gate-connecting barrier layer, wherein the composite-layer formation process comprises: applying a silicon-containing compound set to an outmost existing barrier layer to form an amorphous silicon layer, and forming an overlying barrier layer on the amorphous silicon layer, wherein the substrate-connecting barrier layer is the outmost existing barrier layer for a first iteration of the one or more iterations, and wherein the gate-connecting barrier layer is the overlying barrier layer resulted from a last iteration of the one or more iterations; and

providing a conductive gate layer on the gate-connecting barrier layer, wherein a first silicon-containing compound set is applied to the substrate-connecting barrier layer for a first time length to form a first amorphous silicon layer, wherein a first overlying barrier layer is formed on the first amorphous silicon layer, wherein a second silicon-containing compound set is applied to the first overlying barrier layer for a second time length to form a second amorphous silicon layer, and wherein the second time length is unequal to the first time length.

15. A method for manufacturing a semiconductor device, the method comprising:

providing a semiconductor substrate structure;

providing a substrate-connecting barrier layer on the semiconductor substrate structure;

performing one or more iterations of a composite-layer formation process to provide a gate-connecting barrier layer, wherein the composite-layer formation process comprises: applying a silicon-containing compound set to an outmost existing barrier layer to form an amorphous silicon layer, and forming an overlying barrier layer on the amorphous silicon layer, wherein the substrate-connecting barrier layer is the outmost existing barrier layer for a first iteration of the one or more iterations, and wherein the gate-connecting barrier layer is the overlying barrier layer resulted from a last iteration of the one or more iterations; and

providing a conductive gate layer on the gate-connecting barrier layer, wherein a first silicon-containing compound set is applied to the substrate-connecting barrier layer to form a first amorphous silicon layer, wherein a first overlying barrier layer is formed on the first amorphous silicon layer, wherein a second silicon-containing compound set is applied to the first overlying barrier layer to form a second amorphous silicon layer, wherein the first silicon-containing compound set includes a first silicon-containing compound, wherein the second silicon-containing compound set includes a second silicon-containing compound, and wherein a molecular formula of the second silicon-containing compound is different from a molecular formula of the first silicon-containing compound.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2015
From: XU, JIANHUA
To: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
Reel/Frame 035439/0091 →
Priority Claims (1)
CN 2014 1 0325958 · Jul 9, 2014 · national
Continuity (1)
Related Publication 20160013289A1 · Jan 14, 2016