IP Library › Granted Patent US 9,653,609
Granted Patent B2
US 9,653,609 · App. 14/718,336 · Granted May 16, 2017

Thin film transistor and organic light emitting diode display including the same

Inventors: Hee jun Yoo (Yongin-si, KR); Sang Ho Park (Suwon-si, KR); Joung-Keun Park (Asan-si, KR); Ki Wan Ahn (Seoul, KR); Joo Sun Yoon (Seoul, KR); Seung Min Lee (Jeju-si, KR); Yong Jae Jang (Seoul, KR); Jae Hyuk Jang (Seongnam-si, KR); Kwang Young Choi (Incheon, KR); Jung Hyun Kim (Seoul, KR)
Assignee: SAMSUNG DISPLAY CO., LTD.
H01L29/78648H01L27/0705H01L29/41733H01L29/78672H01L29/78696
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Quick Facts
Patent No.
US 9,653,609
App. No.
14/718,336
Granted
May 16, 2017
Kind
B2
Abstract

A thin film transistor including a substrate; a first gate electrode on the substrate; a first insulating layer covering the substrate and the first gate electrode; a semiconductor on the first insulating layer and overlapping the first gate electrode; a second insulating layer covering the first insulating layer and the semiconductor; a second gate electrode on the second insulating layer and crossing the first gate electrode in plane; a third insulating layer covering the second gate electrode and the second insulating layer; a first source electrode and a first drain electrode on the third insulating layer and connected to the semiconductor; and a second source electrode and a second drain electrode on a same layer as the first source electrode and the first drain electrode and connected to the semiconductor.

Claims (61)

1. A thin film transistor, comprising:

a substrate;

a first gate electrode on the substrate;

a first insulating layer covering the substrate and the first gate electrode;

a semiconductor on the first insulating layer and overlapping the first gate electrode;

a second insulating layer covering the first insulating layer and the semiconductor;

a second gate electrode on the second insulating layer and crossing the first gate electrode in plane;

a third insulating layer covering the second gate electrode and the second insulating layer;

a first source electrode and a first drain electrode on the third insulating layer and connected to the semiconductor; and

a second source electrode and a second drain electrode on a same layer as the first source electrode and the first drain electrode and connected to the semiconductor, wherein:

the first gate electrode controls a first current path formed through the first source electrode, the first drain electrode, and the semiconductor, and

the second gate electrode controls a second current path formed through the second source electrode, the second drain electrode, and the semiconductor.

2. The thin film transistor as claimed in claim 1 , wherein:

the first source electrode and the first drain electrode are positioned in a length direction of the first gate electrode, and

the second source electrode and the second drain electrode are positioned in a length direction of the second gate electrode.

3. The thin film transistor as claimed in claim 2 , wherein:

the first source electrode and the first drain electrode face each other based on the second gate electrode, and

the second source electrode and the second drain electrode face each other based on the first gate electrode.

4. The thin film transistor as claimed in claim 3 , wherein the semiconductor includes:

a first channel region overlapping the second gate electrode, and a first source region and a first drain region positioned at respective sides of the first channel region, and

a second channel region overlapping the first gate electrode, and a second source region and a second drain region positioned at respective sides of the second channel region, and

the first channel region and the second channel region correspond to a same region.

5. The thin film transistor as claimed in claim 4 , wherein:

the first source electrode and the first drain electrode are connected to the first source region and the first drain region through a pair of first contact holes which are formed in the second insulating layer and the third insulating layer to expose the first source region and the first drain region, respectively, and

the second source electrode and the second drain electrode are connected to the second source region and the second drain region through a pair of second contact holes which are formed in the second insulating layer and the third insulating layer to expose the second source region and the second drain region, respectively.

6. The thin film transistor as claimed in claim 4 , wherein the first source electrode, the second source electrode, the first drain electrode, and the second drain electrode surround the first channel region in plane.

7. The thin film transistor as claimed in claim 1 , further comprising:

a first gate line transferring a first gate signal to the first gate electrode; and

a second gate line transferring a second gate signal to the second gate electrode,

wherein:

the first gate electrode is a part of the first gate line, the second gate electrode is a part of the second gate line, and

the first gate line and the second gate line are electrically separated from each other.

8. The thin film transistor as claimed in claim 1 , wherein:

the first source electrode and the first drain electrode are coupled to the semiconductor through a pair of first contact holes, wherein

the first gate electrode extends to overlap at least one of the pair of first contact holes.

9. An organic light emitting diode display, comprising:

a substrate;

a thin film transistor on the substrate; and

an organic light emitting diode connected to the thin film transistor,

the thin film transistor including:

a first gate electrode on the substrate,

a first insulating layer covering the substrate and the first gate electrode,

a semiconductor on the first insulating layer and overlapping the first gate electrode,

a second insulating layer covering the first insulating layer and the semiconductor,

a second gate electrode on the second insulating layer and crossing the first gate electrode in plane,

a third insulating layer covering the second gate electrode and the second insulating layer,

a first source electrode and a first drain electrode on the third insulating layer and connected to the semiconductor, and

a second source electrode and a second drain electrode on a same layer as the first source electrode and the first drain electrode and connected to the semiconductor, wherein:

the first gate electrode controls a first current path formed through the first source electrode, the first drain electrode, and the semiconductor, and

the second gate electrode controls a second current path formed through the second source electrode, the second drain electrode, and the semiconductor.

10. The organic light emitting diode display as claimed in claim 9 , wherein:

the first source electrode and the first drain electrode are positioned in a length direction of the first gate electrode, and

the second source electrode and the second drain electrode are positioned in a length direction of the second gate electrode.

11. The organic light emitting diode display as claimed in claim 10 , wherein:

the first source electrode and the first drain electrode face each other based on the second gate electrode, and

the second source electrode and the second drain electrode face each other based on the first gate electrode.

12. The organic light emitting diode display as claimed in claim 11 , wherein the semiconductor includes:

a first channel region overlapping the second gate electrode, and a first source region and a first drain region positioned at respective sides of the first channel region, and

a second channel region overlapping the first gate electrode, and a second source region and a second drain region positioned at respective sides of the second channel region, and

the first channel region and the second channel region correspond to a same region.

13. The organic light emitting diode display as claimed in claim 12 , wherein the first source electrode, the second source electrode, the first drain electrode, and the second drain electrode surround the first channel region in plane.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 21, 2015
From: YOO, HEE JUN; PARK, SANG HO; PARK, JOUNG-KEUN; AHN, KI WAN; YOON, JOO SUN; LEE, SEUNG MIN; JANG, YONG JAE; JANG, JAE HYUK; CHOI, KWANG YOUNG; KIM, JUNG HYUN
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 035688/0294 →
Priority Claims (1)
KR 10-2014-0169122 · Nov 28, 2014 · national
Continuity (1)
Related Publication 20160155858A1 · Jun 2, 2016