Circuits and methods for reducing an interference signal that spectrally overlaps a desired signal
Under one aspect, a method is provided for processing a received signal, the received signal including a desired signal and an interference signal that spectrally overlaps the desired signal. The method can include obtaining an amplitude of the received signal. The method also can include obtaining an average amplitude of the received signal based on at least one prior amplitude of the received signal. The method also can include subtracting the amplitude from the average amplitude to obtain an amplitude residual. The method also can include, based upon an absolute value of the amplitude residual being less than or equal to a first threshold, inputting the received signal into an interference suppression algorithm so as to generate a first output including the desired signal with reduced contribution from the interference signal.
1. A method for processing a received signal, the received signal including a desired signal and an interference signal that spectrally overlaps the desired signal, the method comprising:
obtaining an amplitude of the received signal;
obtaining an average amplitude of the received signal based on at least one prior amplitude of the received signal;
subtracting the amplitude from the average amplitude to obtain an amplitude residual; and
based upon an absolute value of the amplitude residual being less than or equal to a first threshold, inputting the received signal into an interference suppression algorithm so as to generate a first output including the desired signal with reduced contribution from the interference signal;
wherein the interference signal originates from a source different from the desired signal.
2. The method of claim 1 , further comprising bypassing the interference suppression algorithm based upon the absolute value of the amplitude residual being greater than the first threshold.
3. The method of claim 2 , further comprising, based upon bypassing the interference suppression algorithm, generating a second output equal to a predetermined value.
4. The method of claim 1 , further comprising bypassing the interference suppression algorithm based upon the absolute value of the amplitude being less than a second threshold.
5. The method of claim 1 , further comprising bypassing the interference suppression algorithm based upon a power of the received signal being less than a second threshold.
6. The method of claim 1 , further comprising bypassing the interference suppression algorithm based upon an interference to noise ratio of the received signal being less than a second threshold.
7. The method of claim 4 , further comprising, based upon bypassing the interference suppression algorithm, generating a second output equal to the received signal.
8. The method of claim 1 , wherein the first threshold is fixed.
9. The method of claim 1 , wherein the first threshold varies as a function of the amplitude.
10. The method of claim 1 , wherein the received signal includes a digitized time domain signal, wherein the amplitude is that of a first sample of the digitized time domain signal, and wherein the average amplitude is an average of the amplitudes of a plurality of samples of the digitized time domain signal.
11. The method of claim 1 , further comprising:
obtaining a phase of the received signal; and
constructing an output based on the phase and the first output.
12. The method of claim 1 , wherein the interference suppression algorithm operates in an I/Q time domain of the received signal, in a frequency domain of the received signal, in an amplitude domain of the received signal, in a nonlinear amplitude domain of the received signal, or in a combination of more than one domain of the received signal.
13. A circuit for processing a received signal, the received signal including a desired signal and an interference signal that spectrally overlaps the desired signal, the circuit comprising:
an amplitude circuit configured to:
obtain an amplitude of the received signal;
obtain an average amplitude of the received signal based on at least one prior amplitude of the received signal; and
subtract the amplitude from the average amplitude to obtain an amplitude residual; and
an arithmetic circuit configured to, based upon an absolute value of the amplitude residual being less than or equal to a first threshold, input the received signal into an interference suppression algorithm so as to generate a first output including the desired signal with reduced contribution from the interference signal;
wherein the interference signal originates from a source different from the desired signal.
14. The circuit of claim 13 , wherein the arithmetic circuit further is configured to bypass the interference suppression algorithm based upon the absolute value of the amplitude residual being greater than the first threshold.
15. The circuit of claim 14 , wherein the arithmetic circuit further is configured, based upon bypassing the interference suppression algorithm, to generate a second output equal to a predetermined value.
16. The circuit of claim 13 , wherein the arithmetic circuit further is configured to bypass the interference suppression algorithm based upon the absolute value of the amplitude being less than a second threshold.
17. The circuit of claim 13 , wherein the arithmetic circuit further is configured to bypass the interference suppression algorithm based upon a power of the received signal being less than a second threshold.
18. The circuit of claim 13 , wherein the arithmetic circuit further is configured to bypass the interference suppression algorithm based upon an interference to noise ratio of the received signal being less than a second threshold.
19. The circuit of claim 16 , wherein the arithmetic circuit further is configured, based upon bypassing the interference suppression algorithm, to generate a second output equal to the amplitude of the received signal.
20. The circuit of claim 13 , wherein the first threshold is fixed.
21. The circuit of claim 13 , wherein the first threshold varies as a function of the first amplitude.
22. The circuit of claim 13 , wherein the received signal includes a digitized time domain signal, wherein the amplitude is that of a first sample of the digitized time domain signal, and wherein the average amplitude is an average of the amplitudes of a plurality of samples of the digitized time domain signal.
23. The circuit of claim 13 , wherein the amplitude circuit further is configured to
obtain a phase of the received signal; and
the circuit further including a signal construction circuit coupled to the amplitude circuit and to the arithmetic circuit, the signal construction circuit being configured to construct an output based on the phase and the first output.
24. The circuit of claim 13 , wherein the interference suppression algorithm operates in an I/Q time domain of the received signal, in a frequency domain of the received signal, in an amplitude domain of the received signal, in a nonlinear amplitude domain of the received signal, or in more than one domain of the received signal.