IP Library › Granted Patent US 9,664,973
Granted Patent B2
US 9,664,973 · App. 14/348,359 · Granted May 30, 2017

Array substrate and manufacturing method thereof, and display device

Inventors: Changjiang Yan (Beijing, CN); Jing Li (Beijing, CN); Tiansheng Li (Beijing, CN); Zhenyu Xie (Beijing, CN); Xu Chen (Beijing, CN)
Assignees: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD
G02F1/1368G02F1/13439G02F1/136209H01L27/1248H01L27/1259H01L29/78633
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Quick Facts
Patent No.
US 9,664,973
App. No.
14/348,359
Granted
May 30, 2017
Kind
B2
Abstract

The present invention discloses an array substrate and a manufacturing method thereof, and a display device, and relates to the field of display technology, in order to reduce the leakage current of the TFT, improve the stability of the TFT, and enhance the display effect of the display device. The array substrate comprises: a transparent substrate, a TFT on the transparent substrate, a first passivation layer covering the TFT, a first transparent electrode on a surface of the first passivation layer, and a light blocking structure for preventing light transmission provided at a position, corresponding to a channel of the TFT, on a side of the TFT away from the transparent substrate.

Claims (19)

1. An array substrate, comprising a transparent substrate, a thin film transistor on the transparent substrate, a first passivation layer covering the thin film transistor, and a first transparent electrode on a surface of the first passivation layer;

wherein the array substrate further comprises a light blocking structure for preventing light transmission provided at a position, corresponding to a channel of the thin film transistor, on a side of the thin film transistor away from the transparent substrate; and

wherein a portion of the first passivation layer at the position corresponding to the channel of the thin film transistor serves as the light blocking structure, and the portion of the first passivation layer has a surface being of an irregular shape of serration.

2. The array substrate of claim 1 , wherein the light blocking structure includes a light shielding layer located between the thin film transistor and the first passivation layer.

3. The array substrate of claim 2 , wherein material of the light shielding layer includes resin material.

4. The array substrate of claim 1 , further comprising a second passivation layer formed on a surface of the first transparent electrode, wherein the light blocking structure comprises a light shielding layer located between the first passivation layer and the second passivation layer.

5. The array substrate of claim 4 , wherein material of the light shielding layer includes resin material or metal material.

6. A display device, comprising the array substrate of claim 1 .

7. A manufacturing method of an array substrate, comprising:

forming a thin film transistor on a transparent substrate;

forming a light blocking structure for preventing light transmission at a position corresponding to a channel of the thin film transistor on a surface of the substrate formed with the thin film transistor and at a side of the thin film transistor away from the transparent substrate,

wherein the step of forming a light blocking structure for preventing light transmission at a position corresponding to a channel of the thin film transistor on a surface of the substrate formed with the thin film transistor and at a side of the thin film transistor away from the transparent substrate comprises:

forming a first passivation layer on the surface of the substrate formed with the thin film transistor so that a portion of the first passivation layer at the position corresponding to the channel of the thin film transistor serves as the light blocking structure, and the portion of the first passivation layer has a surface being of an irregular shape of serration.

8. The manufacturing method of claim 7 , further comprising:

forming a light shielding layer on the portion of the first passivation layer at the position corresponding to the channel of the thin film transistor.

9. The manufacturing method of claim 8 , wherein material of the light shielding layer includes resin material or metal material.

10. The manufacturing method of claim 9 , wherein before the step of forming a first passivation layer on the surface of the substrate formed with the thin film transistor so that a portion of the first passivation layer at the position corresponding to the channel of the thin film transistor serves as the light blocking structure, and the portion of the first passivation layer has a surface being of an irregular shape of serration, the manufacturing method further comprises:

forming a light shielding layer at the position, corresponding to the channel of the thin film transistor, on the surface of the substrate formed with the thin film transistor.

11. The manufacturing method of claim 10 , wherein material of the light shielding layer includes resin material.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 28, 2014
From: YAN, CHANGJIANG; LI, JING; LI, TIANSHENG; XIE, ZHENYU; CHEN, XU
To: BEIJING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.; BOE TECHNOLOGY GROUP CO., LTD.
Reel/Frame 032559/0763 →
Priority Claims (1)
CN 2013 1 0269302 · Jun 28, 2013 · national
Continuity (1)
Related Publication 20160259190A1 · Sep 8, 2016