Resistive RAM and fabrication method
A structure for a resistive memory device and a method to fabricate the same is disclosed. The method includes providing a bottom electrode comprising a metal and forming a memory layer on the bottom electrode. The memory layer includes a first layer of metal oxide, and a second layer including the nitrogen-containing metal oxide. A top electrode is formed over the memory layer.
1. A method of forming a memory device, comprising:
providing a bottom electrode on a substrate;
forming a memory layer on the bottom electrode including a first layer of metal oxide and a second layer including a nitrogen-containing metal oxide;
forming a top electrode over and directly contacting the nitrogen-containing metal oxide; and
providing a controller including circuits to apply bias arrangements to the top electrode and the bottom electrode to change resistance of the memory layer in program operations.
2. The method of claim 1 , wherein the bottom electrode comprises a transition metal and the nitrogen-containing metal oxide comprises an oxynitride of the transition metal.
3. The method of claim 1 , wherein the nitrogen-containing metal oxide is formed by thermal oxidation in a nitrogen-containing chamber.
4. The method of claim 1 , wherein the bottom electrode comprises a metal having a metal surface, and includes forming the memory layer by oxidizing the metal surface to form a metal oxide over the metal, and exposing the metal oxide to a reaction gas comprising nitrogen to form the nitrogen-containing metal oxide.
5. The method of claim 4 , wherein the metal oxide is formed by thermal oxidation of the metal surface.
6. The method of claim 5 , said thermal oxidation including a first rapid thermal process using oxygen in a reaction chamber.
7. The method of claim 6 , wherein exposing the metal oxide to a reaction gas comprising nitrogen includes a second rapid thermal process, the second rapid thermal process continuing from a temperature hold step of the first rapid thermal process in the reaction chamber using oxygen and nitrogen as the reaction gas to form said nitrogen-containing metal oxide.
8. The method of claim 7 , the first rapid thermal process and the second rapid thermal process each including a reaction hold temperature ranging from about 470 degrees Celsius to about 800 degrees Celsius.
9. The method of claim 1 , wherein forming the bottom electrode includes:
providing an insulating material;
forming an opening in the insulator material;
lining the opening with a diffusion barrier layer;
depositing the metal over the diffusion barrier in the opening for a bottom electrode.
10. A resistive memory device, comprising:
a bottom electrode on a substrate;
a memory layer on the bottom electrode including a first layer of metal oxide and a second layer including a nitrogen-containing metal oxide;
a top electrode over and directly contacting the second layer; and
a controller including circuits to apply bias arrangements to the top electrode and the bottom electrode to change resistance of the memory layer in program operations.
11. The device of claim 10 , wherein the bottom electrode comprises a transition metal and the nitrogen containing metal oxide comprises an oxynitride of the transition metal.
12. The device of claim 11 , wherein the transition metal is tungsten.
13. The device of claim 10 , wherein the first layer of metal oxide includes tungsten oxide, and the second layer includes tungsten oxynitride.
14. The device of claim 10 wherein the bottom electrode comprises a metal having a metal surface, and the metal oxide comprises an oxide of the metal at the metal surface.
15. A resistive memory device, comprising:
a bottom electrode comprising a transition metal on a substrate;
a memory layer on the bottom electrode including a layer of an oxide of the transition metal, and a layer of a nitrogen-containing oxide of the transition metal,
a top electrode over and directly contacting the nitrogen-containing oxide of the transition metal; and
a controller including circuits to apply bias arrangements to the top electrode and the bottom electrode to change resistance of the memory layer in program operations.
16. The device of claim 15 , wherein the transition metal is tungsten.
17. The device of claim 10 , further including a diffusion barrier surrounding and directly contacting the bottom electrode and the memory layer; and directly contacting the top electrode.
18. The device of claim 17 , further comprising a conductive line under the bottom electrode and directly contacting the diffusion barrier layer.
19. The device of claim 10 , wherein the top electrode includes a portion directly contacting the second layer and the top electrode consists of one of a metal material, a metal nitride, and a polysilicon material.
20. The device of claim 10 , wherein the top electrode includes a portion directly contacting the second layer and the top electrode consists of one of titanium nitride, tungsten nitride, tantalum nitride, titanium, tungsten, copper, and aluminum.