IP Library › Granted Patent US 9,689,925
Granted Patent B2
US 9,689,925 · App. 14/076,228 · Granted Jun 27, 2017

Reliable arc fault circuit interrupter tester utilizing a dynamic fault voltage

Inventors: Kerry Berland (Chicago, IL); Paul Berland (Elgin, IL); Mitch Budniak (Highland Park, IL)
Assignee: Unique Technologies, LLC
G01R31/3277G01R31/021G01R31/07G01R31/026
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Quick Facts
Patent No.
US 9,689,925
App. No.
14/076,228
Granted
Jun 27, 2017
Kind
B2
Abstract

An arc fault circuit interrupter test circuit is disclosed. The test circuit incorporates a controller along with at least one power transistor, a current sense circuit and a voltage sense circuit. When the power transistor is operated, the current flowing through the transistor is sensed, and if the current is not at least equal to a threshold value, the voltage at which the power transistor is operated is increased.

Claims (17)

1. An arc fault circuit interrupter test circuit comprising:

i. a line shorting circuit accepting a hot line of an electrical system and a neutral line of an electrical system;

ii. a voltage sense circuit operatively coupled to the hot line of the electrical system and the neutral line of the electrical system for sensing an AC voltage waveform;

iii. a current sense circuit for sensing current flow through said line shorting circuit;

iv. a controller coupled to the voltage sense circuit, the current sense circuit, and to the line shorting circuit, the controller adapted to generate a sequence of control pulses for operating the line shorting circuit and generating a fault, wherein the controller is adapted to generate each control pulse at a specific voltage of the AC voltage waveform, and further adapted to measure a current generated by each control pulse and compare the current to a predetermined level, and when the current is less than the predetermined level, the controller is adapted to generate a next control pulse at a higher voltage level of the AC voltage waveform.

2. The test circuit of claim 1 wherein the controller is adapted to determine that current measured during a control pulse is greater than or equal to the predetermined level and wherein the controller is adapted to generate a total of twelve control pulses on consecutive half cycles at a voltage corresponding to the measured current.

3. The test circuit of claim 1 wherein the voltage sense circuit comprises:

i. a voltage divider that is electrically coupled to one of said hot line of the electrical system and said neutral line of the electrical system; and

ii. an analog to digital converter coupled to said voltage divider and to said controller, wherein said controller is adapted to periodically sample said analog to digital converter and based at least partially on said sampling determine a cycle time to operate a power transistor.

4. The test circuit of claim 1 wherein the current sense circuit comprises:

i. a sense resistor that is electrically coupled to the hot line of the electrical system and the neutral line of the electrical system when a power transistor is operated; and

ii. an analog to digital converter coupled to said sense resistor and to said controller, wherein said controller is adapted to periodically sample said analog to digital converter and based at least partially on said sampling determine a cycle time to operate said power transistor.

5. The test circuit of claim 1 further comprising an indicator and wherein said controller is adapted to monitor said current sense circuit and based on said current sense circuit, operates said indicator.

6. The test circuit of claim 5 where the indicator includes at least one LED.

7. The test circuit of claim 6 wherein the indicator consists of a green LED.

8. The test circuit of claim of 7 wherein the controller is adapted to monitor the current sense circuit to determine if an arc fault circuit breaker electrically coupled to the test circuit has operated and wherein the controller is adapted to operate the indicator based on whether the arc fault circuit breaker has operated.

9. The test circuit of claim 1 further comprising a control pulse timing circuit for ensuring that a control pulse operating the line shorting circuit is finite in duration.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2016
From: BERLAND, KERRY; BERLAND, PAUL; BUDNIAK, MITCHELL
To: UNIQUE TECHNOLOGIES, LLC
Reel/Frame 040242/0976 →
Continuity (2)
Continuation 13080746 · Apr 6, 2011
Related Publication 20150130477A1 · May 14, 2015