Method for manufacturing semiconductor device
View Patent ↗An object is to establish a processing technique in manufacture of a semiconductor device in which an oxide semiconductor is used. A gate electrode is formed over a substrate, a gate insulating layer is formed over the gate electrode, an oxide semiconductor layer is formed over the gate insulating layer, the oxide semiconductor layer is processed by wet etching to form an island-shaped oxide semiconductor layer, a conductive layer is formed to cover the island-shaped oxide semiconductor layer, the conductive layer is processed by dry etching to form a source electrode, and a drain electrode and part of the island-shaped oxide semiconductor layer is removed by dry etching to form a recessed portion in the island-shaped oxide semiconductor layer.
1. A semiconductor device comprising:
a transistor;
a terminal portion;
a first copper layer and a second copper layer;
a first insulating layer over the first copper layer and the second copper layer;
an oxide semiconductor film over the first insulating layer;
a third copper layer and a fourth copper layer over the first insulating layer;
a second insulating layer over the oxide semiconductor film, the third copper layer and the fourth copper layer; and
a pixel electrode and an electrode over the second insulating layer, wherein the pixel electrode and the electrode are transparent,
wherein the third copper layer is electrically connected to the oxide semiconductor film,
wherein the oxide semiconductor film comprises a channel region of the transistor,
wherein the first copper layer comprises a gate electrode of the transistor,
wherein the fourth copper layer is directly in contact with the second copper layer through a first contact hole of the first insulating layer,
wherein the pixel electrode is electrically connected to the third copper layer,
wherein the electrode is electrically connected to the second copper layer through the fourth copper layer, and
wherein the terminal portion comprises the second copper layer, the fourth copper layer, and the electrode.
2. The semiconductor device according to claim 1 , wherein the electrode is electrically connected to the fourth copper layer through a second contact hole of the second insulating layer, wherein a location of the first contact hole is different from a location of the second contact hole.
3. The semiconductor device according to claim 1 , wherein the third copper layer covers the oxide semiconductor film and is in direct contact with one of sides edge of the oxide semiconductor film.
4. The semiconductor device according to claim 1 , wherein the oxide semiconductor film comprises a first semiconductor layer and a second semiconductor layer, wherein the second semiconductor layer is over the first semiconductor layer and is stacked on the first semiconductor layer.
5. The semiconductor device according to claim 4 , wherein the second semiconductor layer is not stacked on the first semiconductor layer on the channel region.
6. The semiconductor device according to claim 1 , wherein the first insulating layer comprises aluminum or tantalum.
7. The semiconductor device according to claim 1 , wherein the second insulating layer comprises aluminum or tantalum.
8. A semiconductor device comprising:
a transistor;
a terminal portion;
a first copper layer and a second copper layer;
a first insulating layer over the first copper layer and the second copper layer;
an oxide semiconductor film over the first insulating layer;
a third copper layer and a fourth copper layer over the first insulating layer;
a second insulating layer over the oxide semiconductor film, the third copper layer and the fourth copper layer; and
a pixel electrode and an electrode over the second insulating layer, wherein the pixel electrode and the electrode are transparent,
wherein the third copper layer is electrically connected to the oxide semiconductor film,
wherein the oxide semiconductor film comprises a channel region of the transistor,
wherein the oxide semiconductor film comprises a region overlapping the third copper layer,
wherein a thickness of the channel region is thinner than the region,
wherein the first copper layer comprises a gate electrode of the transistor,
wherein the fourth copper layer is directly in contact with the second copper layer through a first contact hole of the first insulating layer,
wherein the pixel electrode is electrically connected to the third copper layer,
wherein the electrode is electrically connected to the second copper layer through the fourth copper layer, and
wherein the terminal portion comprises the second copper layer, the fourth copper layer, and the electrode.
9. The semiconductor device according to claim 8 ,
wherein the third copper layer covers the oxide semiconductor film and is in direct contact with one of sides edge of the oxide semiconductor film.
10. The semiconductor device according to claim 8 ,
wherein the oxide semiconductor film comprises a first semiconductor layer and a second semiconductor layer,
wherein the second semiconductor layer is over the first semiconductor layer and is stacked on the first semiconductor layer.
11. The semiconductor device according to claim 10 ,
wherein the second semiconductor layer is not stacked on the first semiconductor layer on the channel region.
12. The semiconductor device according to claim 8 ,
wherein the first insulating layer comprises aluminum or tantalum.
13. The semiconductor device according to claim 8 ,
wherein the second insulating layer comprises aluminum or tantalum.
14. A semiconductor device comprising:
a transistor;
a terminal portion;
a first copper layer and a second copper layer;
a first insulating layer over the first copper layer and the second copper layer;
an oxide semiconductor film over the first insulating layer;
a third copper layer and a fourth copper layer over the first insulating layer;
a second insulating layer over the oxide semiconductor film, the third copper layer and the fourth copper layer; and
a pixel electrode and an electrode over the second insulating layer, wherein the pixel electrode and the electrode are transparent,
wherein the third copper layer is electrically connected to the oxide semiconductor film,
wherein the oxide semiconductor film comprises a channel region of the transistor,
wherein the oxide semiconductor film comprises a region overlapping the third copper layer,
wherein a thickness of the channel region is thinner than the region,
wherein the second insulating layer is directly in contact with the channel region,
wherein the first copper layer comprises a gate electrode of the transistor,
wherein the fourth copper layer is directly in contact with the second copper layer through a first contact hole of the first insulating layer,
wherein the pixel electrode is electrically connected to the third copper layer,
wherein the electrode is electrically connected to the second copper layer through the fourth copper layer, and
wherein the terminal portion comprises the second copper layer, the fourth copper layer, and the electrode.
15. The semiconductor device according to claim 14 ,
wherein the electrode is electrically connected to the fourth copper layer through a second contact hole of the second insulating layer,
wherein a location of the first contact hole is different from a location of the second contact hole.
16. The semiconductor device according to claim 14 ,
wherein the oxide semiconductor film comprises a first semiconductor layer and a second semiconductor layer,
wherein the second semiconductor layer is over the first semiconductor layer and is stacked on the first semiconductor layer.
17. The semiconductor device according to claim 16 ,
wherein the second semiconductor layer is not stacked on the first semiconductor layer on the channel region.
18. The semiconductor device according to claim 14 ,
wherein the first insulating layer comprises aluminum or tantalum.
19. The semiconductor device according to claim 14 ,
wherein the second insulating layer comprises aluminum or tantalum.