Dynamic releasing of cache lines
A computer-implemented method includes, in a transactional memory environment, identifying a transaction and identifying one or more cache lines. The cache lines are allocated to the transaction. A cache line record is stored. The cache line record includes a reference to the one or more cache lines. An indication is received. The indication denotes a request to demote the one or more cache lines. The cache line record is retrieved, and the one or more cache lines are released. A corresponding computer program product and computer system are also disclosed.
1. A computer program product, the computer program product comprising one or more non-transitory computer readable storage media and program instructions stored on said one or more non-transitory computer readable storage media, said program instructions comprising instructions to perform a method comprising, in a transactional memory environment:
identifying a transaction;
identifying one or more cache lines, said one or more cache lines being allocated to said transaction;
storing a cache line record, said cache line record comprising a reference to said one or more cache lines;
receiving an indication, said indication denoting a request to demote said one or more cache lines;
retrieving said cache line record; and
releasing said one or more cache lines;
wherein said transactional memory environment comprises a plurality of processors and is characterized by a behavior that a transactional abort is triggered by a conflict trigger action as to a conflict transaction including a conflict read-set and a conflict write-set, said conflict trigger action being selected from the group consisting of:
any of said plurality of processors storing to either said conflict read-set or said conflict write-set; and
any of said plurality of processors loading from said conflict write-set.
2. The computer program product of claim 1 , wherein said indication is provided by at least one element selected from the group consisting of:
one or more machine-level instructions to a computer hardware component;
one or more values in one or more computer control registers; and
detection of one or more conflict conditions by a contention management policy.
3. The computer program product of claim 1 , wherein:
storing said cache line record comprises storing a reference to load cache lines in a level one cache; and
retrieving said cache line record comprises accessing said level one cache.
4. The computer program product of claim 1 , wherein:
storing said cache line record comprises storing a reference to store cache lines in a store buffer; and
retrieving said cache line record comprises accessing said store buffer.
5. The computer program product of claim 1 , wherein:
storing said cache line record comprises storing a reference to said one or more cache lines in one or more cache line identifying bits; and
retrieving said cache line record comprises accessing at least one of said one or more cache line identifying bits.
6. The computer program product of claim 1 , wherein said indication comprises a set of one or more flags denoting a request for release of only load cache lines, only store cache lines, or both load cache lines and store cache lines.
7. A computer system, the computer system comprising:
a processing circuit;
one or more non-transitory computer readable storage media;
wherein the computer system is configured to perform a method comprising, in a transactional memory environment:
identifying a transaction,
identifying one or more cache lines, said one or more cache lines being allocated to said transaction,
storing a cache line record, said cache line record comprising a reference to said one or more cache lines,
receiving an indication, said indication denoting a request to demote said one or more cache lines,
retrieving said cache line record, and
releasing said one or more cache lines;
wherein said transactional memory environment comprises a plurality of processors and is characterized by a behavior that a transactional abort is triggered by a conflict trigger action as to a conflict transaction including a conflict read-set and a conflict write-set, said conflict trigger action being selected from the group consisting of:
any of said plurality of processors storing to either said conflict read-set or said conflict write-set; and
any of said plurality of processors loading from said conflict write-set.
8. The computer system of claim 7 , wherein said indication is provided by at least one element selected from the group consisting of:
one or more machine-level instructions to a computer hardware component;
one or more values in one or more computer control registers; and
detection of one or more conflict conditions by a contention management policy.
9. The computer system of claim 7 , wherein:
storing said cache line record comprises storing a reference to load cache lines in a level one cache; and
retrieving said cache line record comprises accessing said level one cache.
10. The computer system of claim 7 , wherein:
storing said cache line record comprises storing a reference to store cache lines in a store buffer; and
retrieving said cache line record comprises accessing said store buffer.
11. The computer system of claim 7 , wherein:
storing said cache line record comprises storing a reference to said one or more cache lines in one or more cache line identifying bits; and
retrieving said cache line record comprises accessing at least one of said one or more cache line identifying bits.