IP Library › Granted Patent US 9,698,253
Granted Patent B2
US 9,698,253 · App. 14/836,663 · Granted Jul 4, 2017

Semiconductor fin fabrication method and Fin FET device fabrication method

Inventor: Jing Zhao (Shenzhen, CN)
Assignee: Huawei Technologies Co., Ltd.
H01L29/6681H01L21/02636H01L21/266H01L21/3081H01L21/3086H01L21/31144H01L29/6653H01L29/66795
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Quick Facts
Patent No.
US 9,698,253
App. No.
14/836,663
Granted
Jul 4, 2017
Kind
B2
Abstract

A semiconductor fin fabrication method includes: providing a substrate; selectively epitaxially growing a first mask layer in a predetermined zone on the substrate; selectively epitaxially growing a first epitaxial layer on the substrate by using the first mask layer as a mask; and removing the first mask layer and a part, under the first mask layer, of the substrate by using the first epitaxial layer as a mask and by using an anisotropic etching method, so as to form a fin under the first epitaxial layer. According to the foregoing solutions, a manner in which a selective epitaxial growth technology and an anisotropic etching technology are combined is used It can be ensured that a semiconductor fin and a surface of a gate oxidized layer are perpendicular to each other, roughness of a surface of the semiconductor fin is reduced, and a fin with a smooth side surface is formed.

Claims (75)

1. A semiconductor fin fabrication method, comprising:

providing a substrate;

selectively epitaxially growing a first mask layer in a predetermined zone on the substrate, wherein selectively epitaxially growing the first mask layer further comprises selectively epitaxially growing the first mask layer using chlorine-containing silicon source gas at a temperature between 750° C. to 900° C.;

selectively epitaxially growing a first epitaxial layer on the substrate by using the first mask layer as a mask; and

removing the first mask layer and a part, under the first mask layer, of the substrate by using the first epitaxial layer as a mask and by using an anisotropic etching method, so as to form a fin under the first epitaxial layer.

2. The fabrication method according to claim 1 , further comprising:

removing the first epitaxial layer by means of etching.

3. The fabrication method according to claim 1 , further comprising:

performing rounding processing on a top of the fin by using a high-temperature oxidation method.

4. The fabrication method according to claim 1 , further comprising:

forming flank walls on two sides of the fin;

forming second mask layers on outer sides of the flank walls;

selectively epitaxially growing new fins on outer sides of the second mask layers; and

removing the fin, the flank walls, and the second mask layers by means of anisotropic etching, to expose the new fins.

5. The fabrication method according to claim 4 , wherein spacings between two adjacent new fins are equal.

6. The fabrication method according to claim 1 , further comprising:

forming a first oxidized layer in a zone, except the fin, on the substrate; and

oxidizing a part of the fin to form a second oxidized layer, wherein the second oxidized layer comes into contact with the substrate, and a height of the second oxidized layer is the same as a height of the first oxidized layer.

7. A Fin field-effect transistor (FET) device fabrication method, comprising:

providing a substrate;

selectively epitaxially growing a first mask layer in a predetermined zone on the substrate, wherein selectively epitaxially growing the first mask layer further comprises selectively epitaxially growing the first mask layer using chlorine-containing silicon source gas at a temperature between 750° C. to 900° C.;

selectively epitaxially growing a first epitaxial layer on the substrate by using the first mask layer as a mask;

removing the first mask layer and a part, under the first mask layer, of the substrate by using the first epitaxial layer as a mask and by using an anisotropic etching method, so as to form a fin under the first epitaxial layer;

forming a first oxidized layer in a zone, except the fin, on the substrate;

oxidizing a part of the fin to form a second oxidized layer, wherein the second oxidized layer comes into contact with the substrate, and a height of the second oxidized layer is the same as a height of the first oxidized layer;

performing rounding processing on top corners of the fin by using a high-temperature oxidation method;

forming lateral walls on two sides of the fin;

forming a gate strip intersecting with the fin;

forming side walls on two sides of the gate strip; and

performing ion injection by using the side walls as masks, to form a source/drain zone within the substrate.

8. The fabrication method according to claim 7 , wherein forming a gate strip intersecting with the fin comprises:

forming an epitaxial layer on a top of the fin, tops of the lateral walls, and a surface of the first oxidized layer;

removing an excess epitaxial layer by means of etching, to form the gate strip intersecting with the fin; or

forming a protective layer, along a length direction of the fin, from two sides to the middle of the substrate by using a selective epitaxial growth technology until a trench is formed in a middle location along the length direction of the fin;

forming the gate strip within the trench by means of deposition; and

removing the protective layer by means of etching, to expose the fin.

9. A Fin field-effect transistor (FET) device fabrication method, comprising:

providing a substrate;

selectively epitaxially growing a first mask layer in a predetermined zone on the substrate, wherein selectively epitaxially growing the first mask layer further comprises selectively epitaxially growing the first mask layer using chlorine-containing silicon source gas at a temperature between 750° C. to 900° C.;

selectively epitaxially growing a first epitaxial layer on the substrate by using the first mask layer as a mask;

removing the first mask layer and a part, under the first mask layer, of the substrate by using the first epitaxial layer as a mask and by using an anisotropic etching method, so as to form a fin under the first epitaxial layer;

forming a first oxidized layer in a zone, except the fin, on the substrate;

oxidizing a part of the fin to form a second oxidized layer, wherein the second oxidized layer comes into contact with the substrate, and a height of the second oxidized layer is the same as a height of the first oxidized layer;

depositing a pseudo gate layer on a top of the fin and a surface of the first oxidized layer;

removing an excess pseudo gate layer by means of etching, to form a pseudo gate strip intersecting with the fin;

forming side walls on two sides of the pseudo gate strip;

performing ion injection by using the side walls as masks, to form a source/drain zone within the substrate;

removing the pseudo gate strip; and

forming a gate strip on a gate oxidized layer between the side walls.

10. A Fin FET device fabrication method, comprising:

providing a substrate;

selectively epitaxially growing a first mask layer in a predetermined zone on the substrate, wherein selectively epitaxially growing the first mask layer further comprises selectively epitaxially growing the first mask layer using chlorine-containing silicon source gas at a temperature between 750° C. to 900° C.;

selectively epitaxially growing a first epitaxial layer on the substrate by using the first mask layer as a mask;

removing the first mask layer and a part, under the first mask layer, of the substrate by using the first epitaxial layer as a mask and by using an anisotropic etching method, so as to form a fin under the first epitaxial layer;

forming a first oxidized layer in a zone, except the fin, on the substrate;

oxidizing a part of the fin to form a second oxidized layer, wherein the second oxidized layer comes into contact with the substrate, and a height of the second oxidized layer is the same as a height of the first oxidized layer;

fabricating a gate electrode layer on a top of the fin and a surface of the first oxidized layer;

selectively epitaxially growing a protective layer in a predetermined zone on a surface of the gate electrode layer, wherein the gate electrode layer under the predetermined zone intersects with the fin;

removing the gate electrode layer by means of anisotropic etching and by using the protective layer as a mask, to expose the fin;

removing the protective layer by means of anisotropic etching;

forming side walls on two sides of the gate strip; and

performing ion injection by using the side walls as masks, to form a source/drain zone within the substrate.

11. A Fin FET device fabrication method, comprising:

providing a substrate;

selectively epitaxially growing a first mask layer in a predetermined zone on the substrate, wherein selectively epitaxially growing the first mask layer further comprises selectively epitaxially growing the first mask layer using chlorine-containing silicon source gas at a temperature between 750° C. to 900° C.;

selectively epitaxially growing a first epitaxial layer on the substrate by using the first mask layer as a mask;

removing the first mask layer and a part, under the first mask layer, of the substrate by using the first epitaxial layer as a mask and by using an anisotropic etching method, so as to form a fin under the first epitaxial layer;

forming a first oxidized layer in a zone, except the fin, on the substrate;

oxidizing a part of the fin to form a second oxidized layer, wherein the second oxidized layer comes into contact with the substrate, and a height of the second oxidized layer is the same as a height of the first oxidized layer;

depositing a protective layer on a top of the fin and a surface of the first oxidized layer;

removing the protective layer in a predetermined zone by means of anisotropic etching, wherein the predetermined zone is a zone in which a gate strip is located;

growing a gate electrode layer in the predetermined zone;

removing the protective layer on the top of the fin to expose the fin;

forming side walls on two sides of the gate strip; and

performing ion injection by using the side walls as masks, to form a source/drain zone within the substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 26, 2015
From: ZHAO, JING
To: HUAWEI TECHNOLOGIES CO., LTD.
Reel/Frame 036430/0230 →
Priority Claims (1)
CN 2013 1 0300403 · Jul 17, 2013 · national
Continuity (2)
Continuation PCTCN2014071197 · Jan 23, 2014
Related Publication 20150372110A1 · Dec 24, 2015