IP Library › Granted Patent US 9,704,648
Granted Patent B2
US 9,704,648 · App. 14/527,400 · Granted Jul 11, 2017

Multilayer ceramic capacitor, manufacturing method thereof, and board having the same

Inventors: Jong Ho Lee (Suwon-Si, KR); Myung Jun Park (Suwon-Si, KR); Doo Young Kim (Suwon-Si, KR); Chang Hoon Kim (Suwon-Si, KR)
Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
H01G2/065H01G4/232H01G4/30H01G4/012H01G4/1227
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Quick Facts
Patent No.
US 9,704,648
App. No.
14/527,400
Granted
Jul 11, 2017
Kind
B2
Abstract

A multilayer ceramic capacitor may include: a ceramic body having first and second main surfaces opposing each other in a thickness direction and first and second end surfaces opposing each other in a length direction, a thickness of the ceramic body being greater than a width thereof; a first external electrode disposed on the first end surface and having a greater thickness in a region thereof adjacent to the second main surface than in a region thereof adjacent to the first main surface; a second external electrode disposed on the second end surface and having a greater thickness in a region thereof adjacent to the second main surface than in a region thereof adjacent to the first main surface; and first and second internal electrodes disposed in the ceramic body and connected to the first and second external electrodes, respectively.

Claims (21)

1. A multilayer ceramic capacitor comprising:

a ceramic body having first and second main surfaces opposing each other in a thickness direction and first and second end surfaces opposing each other in a length direction, a thickness of the ceramic body being greater than a width thereof;

a first external electrode disposed on the first end surface and having a greater thickness in a region thereof adjacent to the second main surface than in a region thereof adjacent to the first main surface;

a second external electrode disposed on the second end surface and having a greater thickness in a region thereof adjacent to the second main surface than in a region thereof adjacent to the first main surface; and

first and second internal electrodes disposed in the ceramic body and connected to the first and second external electrodes, respectively,

wherein the first and second external electrodes comprise a glass frit through an entire region from an internal surface of the first and second external electrodes to an end surface of the first and second external electrodes both in the region thereof adjacent to the first main surface, and in the region thereof adjacent to the second main surface, and

wherein a thickness of the first external electrode at a point corresponding to an uppermost internal electrode among the first internal electrodes is smaller than that at a point corresponding to a lowest internal electrode among the first internal electrodes, and a thickness of the second external electrode at a point corresponding to an uppermost internal electrode among the second internal electrodes is smaller than that at a point corresponding to a lowest internal electrode among the second internal electrodes.

2. The multilayer ceramic capacitor of claim 1 , wherein a ratio between a maximum thickness ‘b’ of lower portions of the first and second external electrodes adjacent to the second main surface, and a maximum thickness ‘a’ of upper portions of the first and second external electrodes adjacent to the first main surface, satisfies the inequality: 1.5≦b/a≦4.

3. The multilayer ceramic capacitor of claim 1 , wherein a center of gravity of the multilayer ceramic capacitor is positioned below a center of gravity of the ceramic body.

4. The multilayer ceramic capacitor of claim 1 , wherein the multilayer ceramic capacitor is configured to be mounted on a board, and the first and second internal electrodes extend perpendicularly to a mounting surface of the ceramic body that is configured to face the board when the multilayer ceramic capacitor is mounted thereon.

5. The multilayer ceramic capacitor of claim 1 , wherein the multilayer ceramic capacitor is configured to be mounted on a board, and the first and second internal electrodes extend parallel to a mounting surface of the ceramic body that is configured to face the board when the multilayer ceramic capacitor is mounted thereon.

6. The multilayer ceramic capacitor of claim 1 , wherein each of the first and second external electrodes includes a band portion extending onto the second main surface of the ceramic body.

7. An assembly having a multilayer ceramic capacitor, the assembly comprising:

a printed circuit board having first and second electrode pads formed thereon; and

the multilayer ceramic capacitor mounted on the printed circuit board,

wherein the multilayer ceramic capacitor includes a ceramic body having first and second main surfaces opposing each other in a thickness direction and first and second end surfaces opposing each other in a length direction, a thickness of the ceramic body being greater than a width thereof, a first external electrode disposed on the first end surface and having a greater thickness in a region thereof adjacent to the second main surface than in a region thereof adjacent to the first main surface, a second external electrode disposed on the second end surface and having a greater thickness in a region thereof adjacent to the second main surface than in a region thereof adjacent to the first main surface, and first and second internal electrodes disposed in the ceramic body and connected to the first and second external electrodes, respectively,

wherein the first and second external electrodes comprise a glass frit through an entire region from an internal surface of the first and second external electrodes to an end surface of the first and second external electrodes both in the region thereof adjacent to the first main surface, and in the region thereof adjacent to the second main surface, and

wherein a thickness of the first external electrode at a point corresponding to an uppermost internal electrode among the first internal electrodes is smaller than that at a point corresponding to a lowest internal electrode among the first internal electrodes, and a thickness of the second external electrode at a point corresponding to an uppermost internal electrode among the second internal electrodes is smaller than that at a point corresponding to a lowest internal electrode among the second internal electrodes.

8. The assembly of claim 7 , wherein the multilayer ceramic capacitor is mounted such that the second main surface of the ceramic body is adjacent to and faces the printed circuit board.

9. The assembly of claim 7 , wherein a ratio between a maximum thickness ‘b’ of lower portions of the first and second external electrodes adjacent to the second main surface, and a maximum thickness ‘a’ of upper portions of the first and second external electrodes adjacent to the first main surface, satisfies the inequality: 1.5≦b/a≦4.

10. The assembly of claim 7 , wherein a center of gravity of the multilayer ceramic capacitor is positioned below a center of gravity of the ceramic body.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2015
From: LEE, JONG HO; PARK, MYUNG JUN; KIM, DOO YOUNG; KIM, CHANG HOON
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 034702/0043 →
Priority Claims (1)
KR 10-2014-0084472 · Jul 7, 2014 · national
Continuity (1)
Related Publication 20160005539A1 · Jan 7, 2016