IP Library › Granted Patent US 9,711,105
Granted Patent B2
US 9,711,105 · App. 14/478,130 · Granted Jul 18, 2017

Gate signal line driving circuit for noise suppression and display device

Inventors: Takahiro Ochiai (Chiba, JP); Mitsuru Goto (Chiba, JP); Youzou Nakayasu (Mobara, JP); Yuki Okada (Tama, JP); Naoki Takada (Yokohama, JP)
Assignees: Japan Display Inc.; Panasonic Liquid Crystal Display Co. Ltd.
G09G3/3696G09G3/3674G09G2300/0434
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Quick Facts
Patent No.
US 9,711,105
App. No.
14/478,130
Granted
Jul 18, 2017
Kind
B2
Abstract

A gate signal line driving circuit which suppresses noises in a gate signal and a display device which uses the gate signal line driving circuit are provided. A first basic circuit provided to a gate signal line driving circuit includes a HIGH voltage applying switching element which applies a HIGH voltage to gate signal lines in response to a signal HIGH period, and a LOW voltage applying switching circuit which applies a LOW voltage to the gate signal lines in response to a signal LOW period. In response to a signal HIGH period, a switch of the LOW voltage applying switching circuit of the first basic circuit is turned off based on a signal applied to a switch of the HIGH voltage applying switching element of a second basic circuit which assumes a signal HIGH period earlier than the first basic circuit.

Claims (24)

1. A display device comprising a plurality of gate signal lines and a gate signal line driving circuit, the gate signal line driving circuit comprising a plurality of basic circuits each of which is configured to output a gate signal having a HIGH voltage during a signal HIGH period and having a LOW voltage during a signal LOW period, which is a period other than the signal HIGH period, to the gate signal line, wherein

the plurality of basic circuits includes a first basic circuit and a second basic circuit which is configured to assume a signal HIGH period before the signal HIGH period of the first basic circuit, and

the first basic circuit and the second basic circuit respectively comprise:

a LOW voltage applying switching circuit configured to apply a LOW voltage to the gate signal line in response to the signal LOW period;

a HIGH voltage applying switching element configured to apply a HIGH voltage to the gate signal line in response to the signal HIGH period; and

a LOW voltage applying OFF control element configured to apply an OFF voltage to a switching input terminal of a switch of the LOW voltage applying switching circuit such that the switch of the LOW voltage applying switching circuit is turned off in the signal HIGH period, wherein

the LOW voltage applying OFF control element of the first basic circuit is turned on in response to an ON voltage applied to an internal voltage line,

the internal voltage line is directly connected between the first basic circuit and the second basic circuit without directly connecting with the gate signal line, and

wherein an OFF voltage for the LOW voltage applying OFF control element of the first basic circuit is applied to the internal voltage line and the LOW voltage applying OFF control element of the first basic circuit is turned off in response to the OFF voltage applied to the internal voltage line when the LOW voltage applying switching circuit of the second basic circuit outputs the LOW voltage to the gate signal line.

2. The display device according to claim 1 , wherein the HIGH voltage applying switching element is turned on after the switch of the LOW voltage applying switching circuit is turned off.

3. The display device according to claim 1 , wherein the LOW voltage applying switching circuit comprises a plurality of LOW voltage applying switching elements which are connected to the gate signal line parallel to each other.

4. The display device according to claim 1 , wherein the HIGH voltage applying switching element is turned on in response to the ON voltage applied to the internal voltage line.

5. A display device comprising a plurality of gate signal lines and a gate signal line driving circuit, the gate signal line driving circuit comprising a plurality of basic circuits each of which is configured to output a HIGH voltage during a signal HIGH period and a LOW voltage during a signal LOW period to the gate signal line, wherein

the plurality of basic circuits includes a first basic circuit, and a second basic circuit configured to output the HIGH voltage before the signal HIGH period of the first basic circuit, and

the first basic circuit and the second basic circuit respectively comprise:

a LOW voltage applying switching circuit configured to apply the LOW voltage to the gate signal line in response to the signal LOW period;

a HIGH voltage applying switching element configured to apply the HIGH voltage to the gate signal line in response to the signal HIGH period; and

a LOW voltage applying OFF control element configured to apply an OFF voltage to a switching input terminal of a switch of the LOW voltage applying switching circuit such that the switch of the LOW voltage applying switching circuit is turned off in the signal HIGH period, wherein

the LOW voltage applying OFF control element of the first basic circuit is turned on in response to an ON voltage applied to an internal voltage line,

the internal voltage line is directly connected between the first basic circuit and the second basic circuit without directly connecting with the gate signal line, and

wherein an OFF voltage for the LOW voltage applying OFF control element of the first basic circuit is applied to the internal voltage line and the LOW voltage applying OFF control element of the first basic circuit is turned off in response to the OFF voltage applied to the internal voltage line when the LOW voltage applying switching circuit of the second basic circuit outputs the LOW voltage to the gate signal line.

6. The display device according to claim 5 , wherein the HIGH voltage applying switching element is turned on after the switch of the LOW voltage applying switching circuit is turned off.

7. The display device according to claim 5 , wherein the LOW voltage applying switching circuit comprises a plurality of LOW voltage applying switching elements which are connected to the gate signal line parallel to each other.

8. The display device according to claim 5 , wherein the HIGH voltage applying switching element is turned on in response to the ON voltage applied to the internal voltage line.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2025
From: JAPAN DISPLAY INC
To: MAGNOLIA PURPLE CORPORATION
Reel/Frame 071890/0202 →
NUNC PRO TUNC ASSIGNMENT Recorded Nov 17, 2023
From: PANASONIC LIQUID CRYSTAL DISPLAY CO., LTD.
To: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
Reel/Frame 065615/0327 →
Priority Claims (1)
JP 2009-131609 · May 29, 2009 · national
Continuity (2)
Continuation 12785800 · May 24, 2010
Related Publication 20140375615A1 · Dec 25, 2014