IP Library Granted Patent US 9,712,775
Granted Patent B2
US 9,712,775 · App. 15/052,037 · Granted Jul 18, 2017

Semiconductor device

Inventor: Naoto Fukuoka (Atsugi, JP)
Assignee: OLYMPUS CORPORATION
H04N5/378H01L27/14623H01L27/14634H01L27/14636
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Quick Facts
Patent No.
US 9,712,775
App. No.
15/052,037
Granted
Jul 18, 2017
Kind
B2
Abstract

Provided is a semiconductor device including: a first substrate having a first circuit manufactured thereon; a second substrate having a second circuit manufactured thereon and being arranged to be spaced apart from the first substrate; connection part that is arranged between the first substrate and the second substrate and electrically connect the first circuit and the second circuit; and a shielding layer that is sandwiched, together with the connection part, between the first substrate and the second substrate, is arranged so as to surround the connection part, and is connected to an electric potential with a constant value within at least one of the first substrate and the second substrate.

Claims (36)

1. A semiconductor device comprising:

a first substrate having a first circuit manufactured thereon;

a second substrate having a second circuit manufactured thereon and being arranged to be spaced to the first substrate;

a connection part that is arranged between the first substrate and the second substrate and electrically connects the first circuit and the second circuit; and

a shielding layer that is sandwiched, together with the connection part, between the first substrate and the second substrate, is arranged so as to surround the connection part, and is connected to an electric potential with a constant value within at least one of the first substrate and the second substrate,

wherein, when the signals transmitted and received via the connection part between the first circuit manufactured on the first substrate and the second circuit manufactured on the second substrate are sorted into signals that operate at a low speed and signals that operate at a high speed, the shielding layer is arranged so as to surround the connection part that transmit and receive the signals that operate at the high speed and the shielding layer is not arranged so as to surround the connection part that transmit and receive the signals that operate at the low speed.

2. The semiconductor device according to claim 1 ,

wherein the shielding layer includes a plurality of unit shielding layers, and

wherein, as seen from a direction in which the first substrate and the second substrate are stacked, the plurality of unit shielding layers are arranged so as to surround the connection part.

3. The semiconductor device according to claim 2 ,

wherein the shielding layer includes a first unit shielding layer and a second unit shielding layer, and

wherein the first unit shielding layer and the second unit shielding layer are arranged so as to surround the corresponding connection part.

4. The semiconductor device according to claim 3 ,

wherein the shielding layer further includes a third unit shielding layer and a fourth unit shielding layer, and

wherein the third unit shielding layer and the fourth unit shielding layer are arranged so as to surround the corresponding connection part, in a direction orthogonal to a line connecting positions where the corresponding first unit shielding layer and second unit shielding layer are arranged.

5. The semiconductor device according to claim 2 ,

wherein the plurality of unit shielding layers have the same shape as connecting surfaces for the connection part, the connecting surfaces being respectively manufactured on the first substrate and the second substrate.

6. The semiconductor device according to claim 1 ,

wherein an electric potential is manufactured on either the first substrate or the second substrate, and the shielding layer is connected to the electric potential with a constant value within the substrate on which the shielding layer is manufactured.

7. The semiconductor device according to claim 2 ,

wherein one unit shielding layer of the first unit shielding layer and the second unit shielding layer is manufactured on the first substrate and the other unit shielding layer is manufactured on the second substrate, and

wherein the first unit shielding layer and the second unit shielding layer are respectively connected to electric potentials with constant values within the substrates on which the unit shielding layers are manufactured.

8. The semiconductor device according to claim 1 ,

wherein the first circuit includes a plurality of pixels that convert incident light into electrical signals and transmit the converted electrical signals to the second circuit via the connection part as pixel signals, and

wherein the second circuit includes a processing circuit that receives the pixel signals transmitted from the respective pixels via the connection part and performs processing on the received pixel signals.

9. The semiconductor device according to claim 8 ,

wherein the shielding layer is arranged so as to surround the connection part that transmit and receive analog signals between the first circuit manufactured on the first substrate and the second circuit manufactured on the second substrate.

10. The semiconductor device according to claim 1 ,

wherein the signals that operate at the low speed are control signals.

11. The semiconductor device according to claim 8 ,

wherein the first circuit or the second circuit further include

an AD conversion circuit that converts the pixel signals into digital data;

a serializer that serializes the multi-bit digital data after the AD conversion into 1-bit digital data; and

a clock signal supply circuit that supplies clock signals that drive the serializer.

12. The semiconductor device according to claim 1 ,

wherein the shielding layer is manufactured of the same material as the connection part.

Assignments (2)
CHANGE OF ADDRESS Recorded Jun 20, 2017
From: OLYMPUS CORPORATION
To: OLYMPUS CORPORATION
Reel/Frame 042907/0078 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 24, 2016
From: FUKUOKA, NAOTO
To: OLYMPUS CORPORATION
Reel/Frame 037815/0840 →
Priority Claims (1)
JP 2013-192904 · Sep 18, 2013 · national
Continuity (2)
Continuation PCTJP2014074652 · Sep 18, 2014
Related Publication 20160173803A1 · Jun 16, 2016