IP Library Granted Patent US 9,716,103
Granted Patent B2
US 9,716,103 · App. 14/645,672 · Granted Jul 25, 2017

Stacked type semiconductor memory device

Inventor: Kotaro Noda (Yokkaichi, JP)
Assignee: Kabushiki Kaisha Toshiba
H01L27/11582H01L27/1157
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Quick Facts
Patent No.
US 9,716,103
App. No.
14/645,672
Granted
Jul 25, 2017
Kind
B2
Abstract

According to one embodiment, a semiconductor memory device includes a stacked body which is provided on a substrate and in which an insulating film and an electrode film are alternately stacked. The semiconductor memory device also includes an insulating member which penetrates the stacked body in a stacking direction of the insulating film and the electrode film to thereby separate the stacked body. The semiconductor memory device also includes a semiconductor pillar which penetrates the stacked body in the stacking direction. A maximum portion of the insulating member where a first distance from a side surface of the insulating member to a central plane of the insulating member becomes maximum and a maximum portion of the semiconductor pillar where a second distance from a side surface of the semiconductor pillar to a center line of the semiconductor pillar becomes maximum being provided in different positions in the stacking direction.

Claims (31)

1. A semiconductor memory device comprising:

a stacked body including an insulating film and an electrode film alternately stacked;

an insulating member provided in the stacked body, the insulating member extending in a stacking direction of the stacked body, and in a first direction crossing the stacking direction, the insulating member having a first maximum portion, the first maximum portion having a maximum width of the insulating member along a second direction crossing the stacking direction and the first direction, the first maximum portion being located between a top end portion of the insulating member and a bottom end portion of the insulating member in the stacking direction, the maximum width being greater than a width of the top end portion and a width of the bottom end portion; and

a semiconductor pillar provided in the stacked body and extending in the stacking direction, the semiconductor pillar having a second maximum portion, the second maximum portion having a maximum diameter of the semiconductor pillar along a plane parallel with the first direction and the second direction,

the first maximum portion and the second maximum portion being provided in different positions in the stacking direction.

2. The device according to claim 1 ,

wherein, in the stacking direction, a position of the second maximum portion is higher than a positon of the first maximum portion, and the insulating member, except for end parts of the insulating member, has one or more minimum points having a minimum width of the insulating member along the second direction.

3. The device according to claim 1 ,

wherein, in the stacking direction, a position of the first maximum portion is higher than a positon of the second maximum portion, and the semiconductor pillar, except for end parts of the semiconductor pillar, has one or more minimum points having a minimum diameter of the semiconductor pillar along the plane.

4. The device according to claim 1 ,

wherein, in the stacking direction, a position of the second maximum portion is higher than a positon of the first maximum portion, and the insulating member includes a first part and a second part provided on the first part,

the first part has a first maximum point having a maximum width of the first part along the second direction, and

the second part has a second maximum point having a maximum width of the second part along the second direction.

5. The device according to claim 4 ,

wherein the maximum width of the first maximum point is greater than the maximum width of the second maximum point.

6. The device according to claim 1 ,

wherein, in the stacking direction, a position of the first maximum portion is higher than a positon of the second maximum portion, and the semiconductor pillar includes a first part and a second part provided on the first part,

the first part has a first maximum point having a maximum diameter of the first part along the plane, and

the second part has a second maximum point having a maximum diameter of the second part along the plane.

7. The device according to claim 6 ,

wherein the maximum diameter of the first maximum point is greater than the maximum diameter of the second maximum point.

8. The device according to claim 1 ,

wherein, in the stacking direction, a position of the second maximum portion is higher than a positon of the first maximum portion, and the insulating member includes a first part, a second part provided on the first part and a third part provided on the second part,

the first part has a first maximum point having maximum width of the first part along the second direction,

the second part has a second maximum point having maximum width of the second part along the second direction, and

the third part has a third maximum point having maximum width of the third part along the second direction.

9. The device according to claim 1 ,

wherein, in the stacking direction, a position of the first maximum portion is higher than a positon of the second maximum portion, and the semiconductor pillar includes a first part, a second part provided on the first part and a third part provided on the second part,

the first part has a first maximum point having a maximum diameter of the first part along the plane,

the second part has a second maximum point having a maximum diameter of the second part along the plane, and

the third part has a third maximum point having a maximum diameter of the third part along the plane.

Assignments (5)
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: K.K. PANGEA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 055669/0401 →
MERGER Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: K.K. PANGEA
Reel/Frame 055659/0471 →
CHANGE OF NAME AND ADDRESS Recorded Jan 22, 2021
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 055669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 27, 2017
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA MEMORY CORPORATION
Reel/Frame 043355/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2015
From: NODA, KOTARO
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 035586/0740 →
Continuity (2)
Provisional Application 62047835 · Sep 9, 2014
Related Publication 20160071864A1 · Mar 10, 2016