Method for forming high voltage transistor
A method for forming a high voltage transistor is provided. First, a substrate having a top surface is provided, following by forming a thermal oxide layer on the substrate. At least a part of the thermal oxidation layer is removed to form a recess in the substrate, wherein a bottom surface of the recess is lower than the top surface of the substrate. A gate oxide layer is formed in the recess, then a gate structure is formed on the gate oxide layer. The method further includes forming a source/drain region in the substrate.
1. A method for forming a high voltage transistor, comprising:
providing a substrate having a top surface;
forming a thermal oxide layer on the substrate;
removing a least a part of the thermal oxide layer to form a recess in the substrate, wherein a bottom surface of the recess is lower than the top surface of the substrate;
forming a gate oxide layer in the recess;
forming a gate structure on the gate oxide layer; and
forming a source/drain region in the substrate, wherein before forming the thermal oxide layer, further comprises forming an isolation structure in the substrate, wherein the isolation structure is embedded in the source/drain region.
2. The method for forming a high voltage transistor according to claim 1 , wherein a topmost surface of the thermal oxide layer comprises SiO 2 .
3. The method for forming a high voltage transistor according to claim 1 , wherein the thermal oxide layer has a thickness substantially between 500 angstroms and 1200 angstroms.
4. The method for forming a high voltage transistor according to claim 1 , wherein before forming the recess, a lower portion of the thermal oxide layer is embedded in the substrate.
5. The method for forming a high voltage transistor according to claim 4 , wherein the lower portion of the thermal oxide layer has a thickness substantially between 225 angstroms and 540 angstroms.
6. The method for forming a high voltage transistor according to claim 4 , wherein the recess has a depth substantially equal to the thickness of the lower portion of the thermal oxide layer.
7. The method for forming a high voltage transistor according to claim 1 , wherein the thermal oxide layer is removed by a wet etching process.
8. The method for forming a high voltage transistor according to claim 1 , wherein the thermal oxide layer is completely removed from the substrate.
9. The method for forming a high voltage transistor according to claim 1 , wherein after forming the recess, a part of the thermal oxide layer is remained.
10. The method for forming a high voltage transistor according to claim 1 , wherein the gate oxide layer is formed by a thermal oxidation process.
11. The method for forming a high voltage transistor according to claim 10 , wherein a bottom surface of the recess is oxidized to form the gate oxide layer.
12. The method for forming a high voltage transistor according to claim 1 , wherein the gate oxide layer has a thickness substantially between 500 angstroms and 1200 angstroms.
13. The method for forming a high voltage transistor according to claim 1 , wherein a lower portion of the gate oxide layer is embedded in the substrate.
14. The method for forming a high voltage transistor according to claim 13 , wherein the lower portion of the gate oxide layer has a thickness substantially between 475 angstroms and 1140 angstroms.
15. The method for forming a high voltage transistor according to claim 1 , wherein a topmost surface of the gate oxide layer is level with the top surface of the substrate.
16. The method for forming a high voltage transistor according to claim 1 , wherein the gate structure comprises a dummy gate.
17. A method for forming a high voltage transistor, comprising:
providing a substrate having a top surface;
forming a thermal oxide layer on the substrate;
removing a least a part of the thermal oxide layer to form a recess in the substrate, wherein a bottom surface of the recess is lower than the top surface of the substrate;
forming a gate oxide layer in the recess;
forming a gate structure on the gate oxide layer;
forming a source/drain region in the substrate; and
forming a low voltage transistor on the substrate.
18. The method for forming a high voltage transistor according to claim 17 , further comprises performing a metal gate replacement process to remove the dummy gate of the high voltage transistor and a dummy gate of the low voltage transistor.