IP Library Granted Patent US 9,719,186
Granted Patent B2
US 9,719,186 · App. 15/368,157 · Granted Aug 1, 2017

Two-dimensional large-area growth method for chalcogen compound, method for manufacturing CMOS-type structure, film of chalcogen compound, electronic device comprising film of chalcogen compound, and CMOS-type structure

Inventors: Sun-Kook Kim (Yongin-si, KR); Jong-Soo Rhyee (Yongin-si, KR)
Assignee: UNIVERSITY-INDUSTRY COOPERATION GROUP OF KYUNG HEE UNIVERSITY
C30B1/10C01B19/007C30B1/04C30B1/08C30B29/46H01L21/02568H01L21/02667H01L21/823807
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,719,186
App. No.
15/368,157
Granted
Aug 1, 2017
Kind
B2
Abstract

Provided is a two-dimensional large-area growth method for a chalcogen compound, the method including: depositing a film of a transition metal element or a Group V element on a substrate; thereafter, uniformly diffusing a vaporized chalcogen element, a vaporized chalcogen precursor compound or a chalcogen compound represented by M′X′ 2+δ within the film; and, thereafter, forming a film of a chalcogen compound represented by MX 2 by forming the chalcogen compound represented by MX 2 through post-heating.

Claims (14)

1. A two-dimensional large-area growth method for a chalcogen compound, the method comprising:

forming a film of a transition metal element or a Group V, or Group VI element by depositing the transition metal element or the Group V, or Group VI element on a substrate;

diffusing the chalcogen element, the chalcogen precursor compound or the chalcogen compound represented by M′X′ 2+δ into the film of the transition metal element or the Group V, or Group VI element by contacting through vaporization at least one selected from the group consisting of a chalcogen element, a chalcogen precursor compound and a chalcogen compound represented by M′X′ 2+δ and combinations thereof with the film of the transition metal element or the Group V, or Group VI element, wherein M′ is a transition metal element or a Group V, or Group VI element, X′ is a chalcogen element, and 0≦δ≦0.5; and

forming a film of the chalcogen compound represented by MX 2 by post-heating the film of the transition metal element or the Group V, or Group VI element including the resultant diffused chalcogen element, chalcogen precursor compound or chalcogen compound represented by M′X′ 2+δ , wherein M is a transition metal element or a Group V, or Group VI element and X is a chalcogen element,

wherein, in the film of the transition metal element or the Group V, or Group VI element comprising the diffused chalcogen element, precursor compound or chalcogen compound represented by M′X′ 2+δ , an atom ratio of the chalcogen element to the transition metal element or the Group V element is greater than 2.

2. A method of manufacturing a CMOS-type structure, the method comprising:

forming a patterned film of a first transition metal element or a first Group V element on a substrate by patterning and depositing a first n-type transition metal element or the first Group V, or Group VI element on the substrate;

forming a patterned film of a second transition metal element or a second Group V, or Group VI element on a substrate by pattering and depositing a second p-type transition metal element or the second Group V element on the substrate;

diffusing the chalcogen element, the chalcogen precursor compound or the chalcogen compound represented by M′X′ 2+δ into the patterned film of the first transition metal element or the first Group V element and the patterned film of the second transition metal element or the second Group V element by contacting through vaporization at least one selected from the group consisting of a chalcogen element, a chalcogen precursor compound and a chalcogen compound represented by M′X′ 2+δ and combinations thereof with the patterned film of the first transition metal element or the first Group V element and the patterned film of the second transition metal element or the second Group V element, wherein M′ is a transition metal element or a Group V element, X′ is a chalcogen element, and 0≦δ≦0.5; and

obtaining a complementary metal oxide semiconductor (CMOS)-type structure comprising an N channel metal oxide semiconductor (NMOS) and a P channel metal oxide semiconductor (PMOS) by forming a chalcogen compound represented by MX 2 through post-heating of the patterned film comprising the diffused chalcogen element chalcogen precursor compound or chalcogen compound represented by M′X′ 2+δ and thus by forming a patterned film of the chalcogen compound represented by MX 2 , wherein M is a transition metal element or a Group V element and X is a chalcogen element.

3. The method according to claim 2 , wherein the vaporized chalcogen element, chalcogen precursor compound, or chalcogen compound represented by M′X′ 2+δ vaporized into the patterned film through a physical or chemical vapor-phase synthesis method is diffused using at least one raw material selected from the chalcogen element, the chalcogen precursor or the chalcogen compound represented by M′X′ 2+δ and combinations thereof.

4. The method according to claim 2 , wherein the vaporized chalcogen element, chalcogen precursor compound or chalcogen compound represented by M′X′ 2+δ diffused into the patterned films is migrated by a carrier gas and diffused into the film.

5. The method according to claim 2 , wherein, in the patterned film comprising the diffused chalcogen element, precursor compound or chalcogen compound represented by M′X′ 2+δ , an atom ratio of the chalcogen element to a total of the transition metal element or the Group V element is greater than 2.

6. The method according to claim 2 , further comprising recrystallizing the chalcogen compound represented by MX 2 by annealing the CMOS-type structure obtained through the post-heating.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 1, 2025
From: UNIVERSITY-INDUSTRY COOPERATION GROUP OF KYUNG HEE UNIVERSITY
To: IP3 2025, SERIES 925 OF ALLIED SECURITY TRUST I
Reel/Frame 073062/0622 →
Priority Claims (1)
KR 10-2013-0030687 · Mar 22, 2013 · national
Continuity (2)
Division 14778863
Related Publication 20170081778A1 · Mar 23, 2017