IP Library › Granted Patent US 9,721,982
Granted Patent B2
US 9,721,982 · App. 15/079,976 · Granted Aug 1, 2017

One transistor active pixel sensor with tunnel FET

Inventors: Mihai Adrian Ionescu (Ecublens, CH); Nilay Dagtekin (Lausanne, CH)
Assignee: ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE (EPFL)
H01L27/14616H01L27/14649H01L29/7831
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Quick Facts
Patent No.
US 9,721,982
App. No.
15/079,976
Granted
Aug 1, 2017
Kind
B2
Abstract

A tunneling field effect transistor for light detection, including a p-type region connected to a source terminal, a n-type region connected to a drain terminal, an intrinsic region located between the p-type region and the n-type region to form a P-I junction or an N-I junction with the n-type region or the p-type region, respectively, a first insulating layer and a first gate electrode, the first gate electrode covering a portion of the intrinsic region on one side, and a second insulating layer and a second gate electrode, the second insulating layer and the second gate electrode covering an entire other side of the intrinsic region opposite to the one side, wherein an area of the intrinsic region that is not covered by the first gate electrode forms a non-gated intrinsic area configured for light absorption.

Claims (7)

1. A method for operating a tunnel field effect transistor for detecting light, the tunnel field effect transistor including a p-type region connected to a source terminal, a n-type region connected to a drain terminal, an intrinsic region located between the p-type region and the n-type region to form a P-I junction or a N-I junction with the n-type region or the p-type region, respectively, a first insulating layer and a first gate electrode, the first gate electrode covering a portion of the intrinsic region on one side, and a second insulating layer and a second gate electrode covering an entire other side of the intrinsic region opposite to the one side, an area of the intrinsic region that is not covered by the first gate electrode forming a non-gated intrinsic area for light absorption, the method comprising the steps of:

biasing the second gate electrode to remove a potential well in the intrinsic region for removing charges from the intrinsic region;

applying a voltage to the second gate electrode to form the potential well in the intrinsic region while simultaneously exposing the non-gated intrinsic area to light to accumulate a charge in the non-gated intrinsic area; and

reading out the charge from the non-gated intrinsic area via the drain terminal by generating band-to-band tunneling with a voltage applied to the first gate electrode.

2. The method according to claim 1 , the drain terminal of the tunnel field effect transistor is connected to a column bus, the method further comprising the step of:

driving the column bus to low voltage during the step of applying the voltage; and

releasing a voltage from the column bus during the step of reading out.

Continuity (2)
Provisional Application 62139095 · Mar 27, 2015
Related Publication 20160284750A1 · Sep 29, 2016