Image-capturing unit including chips, substrates, and a connecting section
Provided is an image-capturing unit including an image-capturing chip that includes a first surface having a pixel and a second surface that is on an opposite side of the first surface and has provided thereon an output section that outputs a pixel signal read from the pixel; a transparent substrate that is arranged facing the first surface and includes a wire pattern; a mounting substrate that is arranged facing the second surface and supports the image-capturing chip; and a relay section that is arranged on the mounting substrate and relays, to the wire pattern, the pixel signal output from the output section. Also provided is an image-capturing apparatus including the image-capturing unit described above.
1. An image-capturing unit comprising:
an image-capturing chip that includes (i) at a first surface at which light is incident, a pixel section in which are arranged a plurality of pixels that generate signals by photoelectrically converted charges and (ii) at a second surface that is at a side opposite the first surface, an output section that outputs the signals read from the pixels;
a transparent substrate that is arranged facing the first surface and includes a first wire pattern and a second wire pattern;
a mounting substrate that is arranged facing the second surface and mounts the image-capturing chip;
a connecting section that is connected to the transparent substrate and the mounting substrate and that outputs the signals from the output section to the first wire pattern; and
a signal processing chip that is connected to the first and second wire patterns, and has a signal processing circuit that performs signal processing to the signals from the first wire pattern and that outputs the signals to the second wire pattern, wherein:
the image-capturing chip, the transparent substrate, and the mounting substrate each have different thermal expansion coefficients, and
a difference between the thermal expansion coefficient of the mounting substrate and the thermal expansion coefficient of the transparent substrate is less than a difference between the thermal expansion coefficient of the image-capturing chip and the thermal expansion coefficient of the transparent substrate.
2. The image-capturing unit according to claim 1 , wherein
the connecting section includes a bump that connects the first wire pattern to the output section.
3. The image-capturing unit according to claim 1 , wherein
the signal processing chip is arranged in parallel with the image-capturing chip.
4. The image-capturing unit according to claim 1 , wherein
a heat conducting agent is applied between the image-capturing chip and the mounting substrate.
5. The image-capturing unit according to claim 1 , comprising:
a heat releasing member that is arranged in contact with the mounting substrate.
6. The image-capturing unit according to claim 5 , wherein
the heat releasing member is in contact with the signal processing chip.
7. The image-capturing unit according to claim 6 , wherein
the heat releasing member contacts the mounting substrate and the signal processing chip within the same plane.
8. The image-capturing unit according to claim 1 , comprising:
a sealing member that is arranged to seal a space between the image-capturing chip and the transparent substrate.
9. An image-capturing unit comprising:
a first substrate having a first wire pattern and a second wire pattern;
a first semiconductor chip upon which light that has been transmitted through the first substrate is incident;
a second substrate on which the first semiconductor chip is arranged;
a first connecting section that connects the first wire pattern and the second substrate;
a second semiconductor chip, different from the first semiconductor chip, connected to the first wire pattern; and
a second connecting section that connects the second semiconductor chip and the second wire pattern, wherein:
the first substrate, the first semiconductor chip, and the second substrate each have different thermal expansion coefficients, and
a difference between the thermal expansion coefficient of the second substrate and the thermal expansion coefficient of the first substrate is less than a difference between the thermal expansion coefficient of the first semiconductor chip and the thermal expansion coefficient of the first substrate.
10. The image-capturing unit according to claim 9 , wherein
the first semiconductor chip is provided with (i) pixels including a photoelectrical conversion section that coverts light to charges and (ii) an output section including a terminal connected to the pixels.
11. The image-capturing unit according to claim 10 , wherein
in the first semiconductor chip, a plurality of the pixels is arranged on a first surface to which light is incident from the first substrate, and the output section is arranged on a second surface different from the first surface.
12. The image-capturing unit according to claim 11 , wherein
in the first semiconductor chip, the second surface is at a side opposite the first surface.
13. The image-capturing unit according to claim 12 , wherein:
the first substrate is arranged facing the first surface of the first semiconductor chip; and
the second substrate is arranged facing the second surface of the first semiconductor chip.
14. The image-capturing unit according to claim 10 , wherein
the first connecting section includes a bump that connects the first wire pattern to the second wire pattern.
15. The image-capturing unit according to claim 10 , wherein
the second semiconductor chip has a signal processing circuit that performs signal processing to the signals output from the first semiconductor chip, and outputs the signals to the second wire pattern.
16. The image-capturing unit according to claim 15 , wherein
the second semiconductor chip is arranged in parallel with the first semiconductor chip.
17. The image-capturing unit according to claim 16 , wherein:
the first semiconductor chip is arranged between the first and second substrates in a first direction, and
the second semiconductor chip is arranged in parallel with the first semiconductor chip in a second direction different from the first direction.
18. The image-capturing unit according to claim 9 , wherein
a heat conducting agent is applied between the first semiconductor chip and the second substrate.
19. The image-capturing unit according to claim 9 , wherein
a heat releasing member is arranged that releases heat from the second substrate.
20. The image-capturing unit according to claim 19 , wherein
the heat releasing member is in contact with the second semiconductor chip and releases heat from the second semiconductor chip.
21. The image-capturing unit according to claim 9 , wherein
a sealing member is arranged that seals a space between the first semiconductor chip and the first substrate.