IP Library Granted Patent US 9,739,817
Granted Patent B2
US 9,739,817 · App. 15/003,484 · Granted Aug 22, 2017

Test board and driving method thereof

Inventors: Sang Rock Yoon (Yongin-si, KR); Hyun Il Park (Yongin-si, KR); Yeong Mook Choi (Yongin-si, KR); Jung Mi Yun (Yongin-si, KR)
Assignee: Samsung Display Co., Ltd.
G01R29/26G09G3/006G09G3/2096G09G3/3611G09G2330/06G09G2350/00
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Quick Facts
Patent No.
US 9,739,817
App. No.
15/003,484
Granted
Aug 22, 2017
Kind
B2
Abstract

A test board between a first connector of a cable extending from a source device and a second connector of a sink device including a display panel, includes: a bypass circuit, the bypass circuit to supply a first power from a first output terminal of the first connector to a hot plug detect (HPD) input terminal of the first connector, the first power including a HPD signal.

Claims (28)

1. A test board between a first connector of a cable extending from a source device and a second connector of a sink device including a display panel, the test board comprising:

a bypass circuit, the bypass circuit configured to supply a first power from a first output terminal of the first connector to a hot plug detect (HPD) input terminal of the first connector, the first power including a HPD signal.

2. The test board as claimed in claim 1 ,

wherein the bypass circuit comprises a resistor and a capacitor configured to delay the supplying of the first power for a first time or longer after power is supplied to the source device, and to supply the first power to the HPD input terminal.

3. The test board as claimed in claim 2 , wherein the first time is equal to 200 ms.

4. The test board as claimed in claim 1 , wherein the first power is equal to 3V.

5. The test board as claimed in claim 1 , wherein the bypass circuit comprises a first switch between the first output terminal and the HPD input terminal.

6. The test board as claimed in claim 5 further comprising a second switch coupled between a second output terminal of the first connector and the second connector, the second output terminal being configured to output the first power.

7. The test board as claimed in claim 6 , wherein the first switch and the second switch are implemented as a single switch.

8. The test board as claimed in claim 6 , wherein the first power output from the second output terminal is to be supplied to a power supply of the sink device via the second connector,

wherein driving of the sink device is to be stopped when the second switch is turned off.

9. The test board as claimed in claim 1 further comprising a third switch coupled between a third output terminal of the first connector and the second connector, wherein the third output terminal of the first connector is configured to output a second power that is different from the first power.

10. The test board as claimed in claim 9 ,

wherein the second power is to be supplied to a back light source of the sink device via the second connector, and

wherein driving of the back light source is to be stopped when the third switch is turned off.

11. The test board as claimed in claim 9 , wherein the second power is equal to 12V.

12. The test board as claimed in claim 1 , wherein the source device and the sink device are configured to transmit signals through an embedded display port (eDP) interface.

13. The test board as claimed in claim 1 , wherein the test board comprises a printed circuit board including a plurality of pattern layers, and

wherein at least one pattern layer from among the plurality of pattern layers includes a ground pattern coupled to a ground power.

14. A method for driving a test board coupled between a first connector of a cable extending from a source device and a second connector of a sink device including a display panel, the method comprising:

supplying a first power from a first output terminal of the first connector to a hot plug detect (HPD) input terminal of the first connector, the first power including a HPD signal.

15. The method as claimed in claim 14 , wherein the first power supplied from the first output terminal is delayed for at least 200 ms after a power is supplied to the source device, and the first power is supplied to the HPD input terminal.

16. The method as claimed in claim 14 , further comprising:

controlling a connection of a second output terminal of the first connector to the second connector, the second output terminal being configured to output the first power.

17. The method as claimed in claim 16 , wherein the first power output from the second output terminal is supplied to a power supply of the sink device.

18. The method as claimed in claim 14 further comprising controlling a connection of a third output terminal of the first connector to the second connector, the third output terminal being configured to output a second power that is different from the first power.

19. The method as claimed in claim 18 , wherein the second power is supplied to a back light source of the sink device.

20. The method as claimed in claim 14 , wherein the source device and the sink device transmit signals through an embedded display port (eDP) interface.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2016
From: YOON, SANG ROCK; PARK, HYUN IL; CHOI, YEONG MOOK; YUN, JUNG MI
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 038012/0024 →
Priority Claims (1)
KR 10-2015-0079352 · Jun 4, 2015 · national
Continuity (1)
Related Publication 20160356834A1 · Dec 8, 2016