Buried channel semiconductor device and method for manufacturing the same
A method for manufacturing a semiconductor device includes forming one or more fins extending in a first direction over a substrate. The one or more fins include a first region along the first direction and second regions on both sides of the first region along the first direction. A dopant is implanted in the first region of the fins but not in the second regions. A gate structure overlies the first region of the fins and source/drains are formed on the second regions of the fins.
1. A method for manufacturing a semiconductor device, comprising:
forming one or more fins extending in a first direction over a substrate,
wherein the one or more fins include a first region along the first direction and second regions on both sides of the first region along the first direction;
forming a resist layer over the one or more fins;
forming openings in the resist layer to expose the first region of the one or more fins;
implanting a dopant in the first region of the one or more fins through the openings formed in the resist layer but not in the second regions;
forming a gate structure overlying the first region of the one or more fins; and
forming source/drains on the second regions of the one or more fins.
2. The method for manufacturing a semiconductor device of claim 1 , wherein the dopant is an N-type dopant, selected from the group consisting of P, As, and Sb.
3. The method for manufacturing a semiconductor device of claim 1 , wherein the dopant is a P-type dopant, selected from the group consisting of B, BF 2 , Al, and Ga.
4. The method for manufacturing a semiconductor device of claim 1 ,
wherein a concentration of the dopant in the first region is about 1.5×10 16 to 2.0×10 20 atoms cm −3 .
5. The method for manufacturing a semiconductor device of claim 4 , wherein the concentration of the dopant in the first region is about 1×10 18 atoms cm −3 to 2×10 18 atoms cm −3 .
6. The method for manufacturing a semiconductor device of claim 1 , further comprising removing the resist layer after implanting the dopant.
7. The method for manufacturing a semiconductor device of claim 1 , wherein a concentration of the dopant in the first region is about 1.5×10 16 to 2.0×10 20 atoms cm −3 .
8. The method for manufacturing a semiconductor device of claim 7 , wherein the concentration of the dopant in the first region is about 1×10 18 atoms cm −3 to 2×10 18 atoms cm −3 .
9. A method for manufacturing a semiconductor device, comprising:
forming a plurality of fins extending in a first direction over a substrate,
wherein the plurality of fins include a first region along the first direction and second regions on both sides of the first region along the first direction;
implanting a dopant centered at region in the fins located at about 15 to 20 nm from a top of the fins and 3 to 7 nm in a fin thickness direction from a sidewall extending along the first direction of the fins in the first region of the fins but not in the second regions;
forming a gate structure overlying the first region of the fins; and
forming source/drains on the second regions of the fins.
10. The method for manufacturing a semiconductor device of claim 9 , wherein the dopant is an N-type dopant, selected from the group consisting of P, As, and Sb.
11. The method for manufacturing a semiconductor device of claim 9 , wherein the dopant is a P-type dopant, selected from the group consisting of B, BF 2 , Al, and Ga.
12. The method for manufacturing a semiconductor device of claim 9 , further comprising forming an isolation insulating layer between adjacent fins.
13. The method for manufacturing a semiconductor device of claim 9 , wherein the gate structure comprises a high-k gate dielectric layer and a metal gate electrode.
14. The method for manufacturing a semiconductor device of claim 9 , wherein the source/drain regions are raised source/drain regions.
15. A method for manufacturing a semiconductor device, comprising:
forming a plurality of fins extending in a first direction over a substrate,
wherein the fins include a first region along the first direction and second regions on both sides of the first region along the first direction;
forming a resist layer over the fins;
forming openings in the resist layer to expose the first region of the fins prior to implanting a dopant;
subsequently implanting the dopant to a concentration in the first region of about 1.5×10 16 to 2.0×10 20 atoms cm −3 in the first region of the fins but not in the second regions; and
forming a gate structure overlying the first region of the fins.
16. The method for manufacturing a semiconductor device of claim 15 , wherein the dopant is an N-type dopant, selected from the group consisting of P, As, and Sb.
17. The method for manufacturing a semiconductor device of claim 15 , wherein the dopant is a P-type dopant, selected from the group consisting of B, BF 2 , Al, and Ga.
18. The method for manufacturing a semiconductor device of claim 15 , wherein the concentration of the dopant in the first region is about 1×10 18 atoms cm −3 to 2×10 18 atoms cm −3 .
19. The method for manufacturing a semiconductor device of claim 15 , further comprising removing the resist layer after implanting the dopant.