Method and structure for metal gates

1. A semiconductor device, comprising:

a substrate; and

a gate structure over the substrate, wherein the gate structure includes:

a gate dielectric layer over the substrate,

a barrier layer over the gate dielectric layer,

an oxide layer over the barrier layer, and

a work function metal layer over the oxide layer.

2. The semiconductor device of claim 1 , wherein the barrier layer and the oxide layer contain a common metal element.

3. The semiconductor device of claim 2 , wherein the common metal element is one of: tantalum, titanium, and niobium.

4. The semiconductor device of claim 2 , wherein the barrier layer comprises a nitride of the common metal element and the oxide layer comprises an oxide of the common metal element.

5. The semiconductor device of claim 1 , wherein the barrier layer includes tantalum nitride and the oxide layer includes tantalum oxide.

6. The semiconductor device of claim 1 , wherein the barrier layer includes titanium nitride and the oxide layer includes titanium oxide.

7. The semiconductor device of claim 1 , wherein the barrier layer includes niobium nitride and the oxide layer includes niobium oxide.

8. The semiconductor device of claim 1 , wherein the gate structure further includes an interfacial layer under the gate dielectric layer.

9. The semiconductor device of claim 1 , wherein the gate structure further includes a fill layer over the work function metal layer, and the fill layer comprises aluminum (Al), tungsten (W), cobalt (Co), or copper (Cu).

10. The semiconductor device of claim 1 , wherein the work function metal layer comprises a titanium-containing material and the oxide layer includes tantalum oxide.

11. A semiconductor device, comprising:

a substrate; and

a gate structure over the substrate, wherein the gate structure includes:

a gate dielectric layer over the substrate,

a barrier layer over the gate dielectric layer,

an oxide layer over the barrier layer, and

a work function metal layer over the oxide layer, wherein the barrier layer and the oxide layer contain a common metal element.

12. The semiconductor device of claim 11 , wherein the barrier layer comprises a nitride of the common metal element and the oxide layer comprises an oxide of the common metal element.

13. The semiconductor device of claim 12 , wherein the common metal element is one of tantalum, titanium, and niobium.

14. The semiconductor device of claim 13 , wherein the barrier layer has a thickness ranging from 5 to 20 angstrom (Å), and the oxide layer has a thickness ranging from 5 to 20 Å.

15. The semiconductor device of claim 11 , wherein the oxide layer and the work function metal layer comprises different metal elements.

16. A semiconductor device, comprising:

a substrate; and

first and second gate structures over the substrate, wherein the first and second gate structures each include:

a gate dielectric layer over the substrate,

a barrier layer over the gate dielectric layer, and

an oxide layer over the barrier layer.

17. The semiconductor device of claim 16 , wherein:

the first gate structure further includes an n-type work function metal layer over the oxide layer of the first gate structure; and

the second gate structure further includes a p-type work function metal layer over the oxide layer of the second gate structure.

18. The semiconductor device of claim 16 , wherein the barrier layer includes tantalum nitride and the oxide layer includes tantalum oxide.

19. The semiconductor device of claim 16 , wherein the barrier layer includes titanium nitride and the oxide layer includes titanium oxide.

20. The semiconductor device of claim 16 , wherein the barrier layer includes niobium nitride and the oxide layer includes niobium oxide.