Method of refreshing memory device
A method of refreshing a memory device includes performing normal refresh operations on memory cell rows in response to a refresh command and performing self-refresh operations on the memory cell rows according to a refresh clock signal in response during a self-refresh mode of the memory device between a self-refresh enter command and a self-refresh exit command. The refresh clock signal has a first self-refresh cycle before the self-refresh begins and a second self-refresh cycle, which may be longer than the first self-refresh cycle, after the self-refresh begins. In some examples, no self-refresh may be performed by the memory device during a self-refresh mode.
1. A method of refreshing a memory device, the method comprising:
performing a normal refresh operation on memory cell rows of the memory device in response to a refresh command received from an external source;
performing a self-refresh operation on the memory cell rows according to a refresh clock signal generated by a refresh clock signal generator of the memory device, the refresh clock signal providing a timing of a refresh period of the memory cell rows during a self-refresh period extending between a self-refresh enter command received from the external source and a self-refresh exit command received from the external source; and
changing a cycle of the refresh clock signal,
wherein the refresh clock signal has a first self-refresh cycle before the self-refresh operation begins and a second self-refresh cycle after the self-refresh operation begins, where durations of the first self-refresh cycle and the second self-refresh cycle are different from each other, and
wherein a start time of the self-refresh operation is responsive to the change of the cycle of the refresh clock signal.
2. The method of claim 1 , wherein the second self-refresh cycle is longer than the first self-refresh cycle.
3. The method of claim 1 , further comprising resetting the refresh clock signal during a normal refresh period immediately prior to the self-refresh period in response to the refresh command received from the external source.
4. The method of claim 1 , further comprising restarting a cycle of the refresh clock signal, wherein the self-refresh operation is the first self-refresh operation performed during the self-refresh period, wherein the start time of the self-refresh operation occurs after a delay from receipt of the self-refresh enter command.
5. The method of claim 1 , wherein the normal refresh operation is performed within a standard refresh period of the memory device.
6. The method of claim 1 , further comprising:
receiving an extra refresh command from the external source between the self-refresh exit command and a second self-refresh enter command; and
performing an extra refresh operation in response to the extra refresh command.
7. A method of refreshing a memory device, the method comprising:
performing normal refresh operation to refresh memory cell rows of the memory device in response to the memory device receiving a refresh command;
generating a refresh clock signal by a refresh clock signal generator of the memory device;
entering a self-refresh mode in response to the memory device receiving a self-refresh enter command, wherein, when the memory device is in the self-refresh mode, the memory device is responsive to a timing of the refresh clock signal to perform a self-refresh operation to refresh memory cell rows of the memory device;
exiting the self-refresh mode in response to the memory device receiving a self-refresh exit command; and
determining that no self-refresh operation was performed during the self-refresh mode and generating a flag signal indicating no self-refresh operation was performed during the self-refresh mode.
8. The method of claim 7 , further comprising:
providing the flag signal to a memory controller external to the memory device;
receiving, from the memory controller, the refresh command issued in response to the flag signal; and
performing a refresh operation to refresh the memory cell rows according to the refresh command.
9. The method of claim 7 , further comprising:
when the self-refresh exit command is received, counting first logic sections of the refresh clock signal; and
when a count value of the refresh clock signal is equal to a preset value or greater, performing, by the memory device itself, an extra refresh operation.
10. The method of claim 7 , wherein the refresh clock signal is free-run and has its cycle reset in response to a normal refresh operation.
11. The method of claim 7 , wherein the refresh clock signal has a first self-refresh cycle initiated before entering the self-refresh mode and a second self-refresh cycle immediately following the first self-refresh cycle initiated after entering the self-refresh mode.
12. The method of claim 11 , wherein the second self-refresh cycle is longer than the first self-refresh cycle.
13. The method of claim 7 , wherein a cycle of the refresh clock signal is restarted prior to a completion of the cycle of the refresh clock signal, wherein a start time of the self-refresh operation to be performed in response to the self-refresh enter command is changed in response to the restarting of the cycle of the refresh clock signal.
14. The method of claim 7 , wherein the normal refresh operation is performed within a standard refresh period of the memory device.
15. A method of operating a memory device, comprising:
operating the memory device in a self-refresh mode including during a first self-refresh period;
operating the memory device in a normal refresh mode including during a first normal refresh period;
generating a refresh clock with a refresh clock signal generation circuit of the memory device;
during the first normal refresh period, in response to receiving a first external refresh command, resetting the refresh clock to interrupt a first cycle of the refresh clock and start a second cycle of the refresh clock;
prior to completion of the second cycle of the refresh clock, initiating the first self-refresh period in response to receiving an enter self-refresh command; and
in response to completion of the second cycle of the refresh clock, performing a first self-refresh operation of memory cell rows of the memory device.
16. The method of claim 15 , wherein the refresh clock has the second cycle before the first self-refresh operation begins and a third cycle after the first self-refresh operation begins, where durations of the second cycle and the third cycle of the refresh clock are different from each other.
17. The method of claim 16 , wherein the third cycle of the refresh clock signal is longer than the second cycle of the refresh clock signal.
18. The method of claim 15 , further comprising:
determining that no self-refresh operation was performed during the self-refresh mode and generating a flag signal indicating no self-refresh operation was performed during the self-refresh mode.
19. The method of claim 18 , further comprising:
providing the flag signal to a memory controller external to the memory device;
receiving, from the memory controller, a second external refresh command issued in response to the flag signal; and
performing an extra refresh operation to refresh the memory cell rows according to the second external refresh command.