IP Library Granted Patent US 9,768,090
Granted Patent B2
US 9,768,090 · App. 14/304,331 · Granted Sep 19, 2017

Substrate design for semiconductor packages and method of forming same

Inventors: Yu-Min Liang (Zhongli, TW); Mirng-Ji Lii (Sinpu Township, TW); Jiun Yi Wu (Zhongli, TW)
Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
H01L23/145H01L21/486H01L21/4857H01L21/561H01L23/13H01L23/5383H01L23/5384H01L23/5389H01L24/17H01L24/19H01L24/81H01L24/97H01L25/0657H05K1/182H05K3/4697H01L21/568H01L23/3128H01L23/367H01L23/42H01L23/49811H01L23/49816H01L2224/12105H01L2224/131H01L2224/13147H01L2224/16227H01L2224/32225H01L2224/32245H01L2224/73204H01L2224/73253H01L2224/73267H01L2224/81005H01L2224/81192H01L2224/83005H01L2224/92125H01L2224/97H01L2225/06513H01L2225/06517H01L2225/06541H01L2225/06565H01L2924/12042H01L2924/1533H01L2924/15151H01L2924/15153H01L2924/15159H01L2924/15311H01L2924/15313H01L2924/15331H01L2924/16235H01L2924/16251H01L2924/181H01L2924/18162H05K1/0203H05K3/007H05K2201/066
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Quick Facts
Patent No.
US 9,768,090
App. No.
14/304,331
Granted
Sep 19, 2017
Kind
B2
Abstract

An embodiment device package includes a package substrate and a first and a second die bonded to the package substrate. The package substrate includes a build-up portion comprising a first contact pad and a plurality of bump pads. The package substrate further includes an organic core attached to the build-up portion, a through-via electrically connected to the first contact pad and extending through the organic core, a second contact pad on the through-via, a connector on the second contact pad, and a cavity extending through the organic core. The cavity exposes the plurality of bump pads, and the first die is disposed on the cavity and is bonded to the plurality of bump pads.

Claims (55)

1. A device package comprising:

a first package substrate comprising:

a build-up portion comprising a first contact pad and a plurality of bump pads in a first surface of the build-up portion;

a dielectric layer attached to the first surface of the build-up portion;

an organic core attached to the dielectric layer, the organic core being a different material composition than the build-up portion;

a through-via extending through the organic core, wherein the through-via is electrically connected to the first contact pad;

a second contact pad on the through-via;

a connector on the second contact pad;

a solder resist disposed around the connector; and

a cavity extending through the organic core, the solder resist, and the dielectric layer, wherein the cavity exposes the plurality of bump pads;

a first die disposed in the cavity, wherein the first die is bonded to the plurality of bump pads;

an underfill dispensed in the cavity between the first die and the build-up portion, the underfill being different from the dielectric layer; and

a second die bonded to the first package substrate.

2. The device package of claim 1 , wherein the first package substrate further comprises a third contact pad at an opposing surface of the build-up portion as the first surface, and wherein the second die is disposed on a second device package bonded to the third contact pad.

3. The device package of claim 1 , further comprising a third device package bonded to the first package substrate, wherein the second die is disposed between the third device package and the first package substrate.

4. The device package of claim 1 , wherein the build-up portion is a coreless build-up portion.

5. A method for forming a device package comprising:

forming a build-up portion, the build-up portion comprising one or more first dielectric layers, a plurality of bump pads in a first side of the first dielectric layers, and a conductive feature in the first side of the first dielectric layers;

forming a laminate portion comprising:

attaching an organic core to the build-up portion with a second dielectric layer, the organic core being a different material composition than the build-up portion;

forming a through-via extending through the organic core and the second dielectric layer, wherein the through-via is electrically connected to the conductive feature in the build-up portion;

disposing a solder resist on the organic core, the solder resist having a first side and a second side opposite the first side, the first side of the solder resist facing the build-up portion; and

forming a cavity extending through the organic core, the solder resist, and the second dielectric layer, wherein the plurality of bump pads are exposed by the cavity, wherein the cavity has a first height extending from the first side of the first dielectric layers to the second side of the solder resist;

bonding a first die to the plurality of bump pads, the first die having a first surface and a second surface opposite the first surface, the first surface of the first die facing the build-up portion, wherein the first die is disposed in the cavity, wherein the first die has a second height extending from the first side of the first dielectric layers to the second surface of the first die, the second height less than the first height; and

bonding a second die to the build-up portion.

6. The method of claim 5 , wherein bonding the second die comprises:

providing a second device package comprising the second die; and

bonding the second device package to the build-up portion.

7. The method of claim 6 , wherein bonding the second device package comprises bonding the second device package to an opposing side of the build-up portion as the first die.

8. The method of claim 5 , wherein the one or more first dielectric layers are substantially free of an organic material.

9. A method for forming a device package comprising:

forming a build-up portion comprising a first contact pad and a plurality of bump pads;

patterning a first dielectric on the build-up portion, the first dielectric covering the first contact pad, the first dielectric including a cavity exposing the plurality of bump pads;

attaching an organic core to the first dielectric;

patterning an opening extending through the first dielectric and the organic core, the opening exposing the first contact pad;

forming a through-via in the opening, the through via contacting the first contact pad;

forming a second contact pad on the through-via;

forming a connector on the second contact pad; and

removing a portion of the organic core to expand the cavity through remaining portions of the organic core.

10. The method of claim 9 , wherein forming the build-up portion comprises:

providing carrier having a seed layer disposed on a surface of the carrier;

forming the first contact pad and the plurality of bump pads on the seed layer;

forming a second dielectric layer on the first contact pad, the plurality of bump pads, and the seed layer;

removing the carrier; and

removing the seed layer to expose the first contact pad and the plurality of bump pads.

11. The method of claim 10 , wherein removing the seed layer comprises an etching process.

12. The method of claim 10 , wherein forming build-up portion comprises simultaneously forming a second build-up portion on an opposing side of the carrier as the build-up portion.

13. The method of claim 9 , wherein attaching the organic core comprises:

disposing an uncured dielectric layer over the build-up portion, wherein the uncured dielectric layer is patterned to expose the plurality of bump pads;

disposing the organic core over the uncured dielectric layer; and

performing a curing process to adhere the organic core to the build-up portion.

14. The method of claim 9 , further comprising bonding a die to the plurality of bump pads, wherein the die is disposed in the cavity.

15. The device package of claim 1 , wherein the through-via extends through the dielectric layer.

16. The device package of claim 1 , wherein the first die has a first surface and a second surface opposite the first surface, the first die having connectors on the first surface, the first die bonded to the plurality of bump pads with the connectors, the second surface exposed by the cavity.

17. The device package of claim 1 , wherein the through-via includes a hollow center portion.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2014
From: LIANG, YU-MIN; LII, MIRNG-JI; WU, JIUN YI
To: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
Reel/Frame 033178/0411 →
Continuity (2)
Continuation In Part 14181305 · Feb 14, 2014
Related Publication 20150235915A1 · Aug 20, 2015