Semiconductor device and method of fabricating the same
A semiconductor device is provided. A substrate includes a fin. The fin extends in a first direction. A gate structure is disposed on a first region of the fin. The gate structure extends in a second direction crossing the first direction. A source/drain is disposed on a second region of the fin. The first source/drain is disposed on at least one sidewall of the gate structure. A top surface of the first region is lower than a top surface of the second region.
1. A semiconductor device comprising:
a substrate including a fin, wherein the fin extends in a first direction;
a gate structure disposed on a first region of the fin,
wherein the gate structure extends in a second direction crossing the first direction and includes a gate insulation layer and a gate electrode;
a source/drain disposed on a second region of the fin, wherein the source/drain is disposed on at least one sidewall of the gate structure; and
a spacer disposed on a third region of the fin and interposed between the source/drain and the gate structure,
wherein the third region of the fin is vertically overlapped with spacer and interposed between the first region of the fin and the second region of the fin,
wherein a top surface of the first region is lower than a top surface of the second region,
wherein a top surface of the third region is higher than a top surface of the first region and a top surface of the second region, and
wherein the gate insulation layer is disposed between the gate electrode and the spacer.
2. The semiconductor device of claim 1 ,
wherein the top surface of the first region is convex.
3. The semiconductor device of claim 2 ,
wherein the convex top surface of the first region is substantially smooth.
4. The semiconductor device of claim 1 ,
wherein a width of the first region is smaller than that of the second region, wherein the widths are measured in the second direction.
5. The semiconductor device of claim 1 ,
wherein the source/drain includes a diamond-shaped cross-section.
6. The semiconductor device of claim 1 , further comprising an isolation layer disposed on the substrate,
wherein the second region of the fin is in contact with the isolation layer and the first region of the fin is spaced apart from the isolation layer.
7. The semiconductor device of claim 6 ,
wherein the top surface of the first region is lower than a top surface of the isolation layer.
8. The semiconductor device of claim 1 ,
wherein the first region of the fin includes a channel region and the channel region is U-shaped.