IP Library › Granted Patent US 9,786,109
Granted Patent B2
US 9,786,109 · App. 14/973,322 · Granted Oct 10, 2017

Use of a biphase code matched filter to receive protocols with code violations

Inventor: Martin Posch (Graz, AT)
Assignee: NXP B.V.
G07C9/00309G07C2009/00365G07C2009/00373G07C2009/00793G07C2209/61H04L25/49
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Quick Facts
Patent No.
US 9,786,109
App. No.
14/973,322
Granted
Oct 10, 2017
Kind
B2
Abstract

In accordance with various example embodiments, a method of receiving a protocol in the receiver, wherein the legacy protocol includes non-biphase encoded information, decoding the legacy protocol using a biphase decoder to produce a detected code, and correlating the detected code with a known code to verify the non-biphase encoded information.

Claims (24)

1. A method of decreasing false detection of wake-up patterns of a receiver, comprising:

receiving a protocol frame in the receiver, wherein the protocol frame includes a preamble, non-biphase code violation encoded information having a plurality of bit lengths, and a wake up pattern;

decoding the protocol frame using a biphase decoder to produce a detected code;

correlating the code violation of the detected code with a known code to verify the non-biphase encoded information; and

over-sampling the detected code to produce a plurality of bits and inputting the plurality of bits into a correlator.

2. The method of claim 1 , wherein decoding the protocol frame further comprises decoding the code violation and the wake up pattern respectively.

3. The method of claim 2 , wherein decoding the code violation results in an irregular pattern of ones and zeroes.

4. The method of claim 1 , wherein decoding the protocol frame further comprises using a Manchester matched filter to decode the protocol frame.

5. The method of claim 2 , comprising decoding the wake up pattern to result in a regular pattern of ones and zeroes and adding the decoded code violation to the decoded wake up pattern to produce a sum pattern.

6. The method of claim 5 , comprising over-sampling the sum pattern to produce a plurality of bits and inputting the plurality of bits into a correlator.

7. The method of claim 6 , comprising correlating the sum pattern to a known pattern to decrease the false wake up rate of the receiver.

8. The method of claim 1 , wherein the biphase decoder integrates the protocol frame over complete bit lengths to produce the detected code.

9. A receiver to decrease false wake-up patterns of a receiver circuit, comprising:

a receiver front end configured to receive a protocol frame, wherein the protocol frame includes a preamble, non-biphase encoded code violation information having a plurality of bit lengths, and a wake up pattern;

a biphase decoder configured to decode the protocol frame to produce a detected code; and

a correlator configured to correlate the code violation of the detected code with a known code to verify the non-biphase encoded information,

wherein the detected code is over-sampled to produce a plurality of bits and the plurality of bits is input into a correlator.

10. The receiver of claim 9 , wherein the protocol frame includes the code violation and wake up pattern respectively.

11. The receiver of claim 10 , wherein the code violation is decoded to result in an irregular pattern of ones and zeroes.

12. The receiver of claim 9 , wherein the biphase decoder includes a Manchester matched filter to decode the protocol frame.

13. The receiver of claim 11 , wherein the wake up pattern is decoded to result in a regular pattern of ones and zeroes and the decoded code violation is added to the decoded wake up pattern to produce a sum pattern.

14. The receiver of claim 13 , herein the sum pattern is over-sampled to produce a plurality of bits and the plurality of bits is input into a correlator.

15. The receiver of claim 14 , wherein the sum pattern is correlated to a known pattern to decrease the false wake up rate of the receiver.

16. The receiver of claim 9 , wherein the biphase decoder integrates the protocol frame over complete bit lengths to produce the detected code.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2015
From: POSCH, MARTIN
To: NXP B.V.
Reel/Frame 037321/0035 →
Continuity (1)
Related Publication 20170178435A1 · Jun 22, 2017