IP Library › Granted Patent US 9,793,240
Granted Patent B2
US 9,793,240 · App. 14/529,492 · Granted Oct 17, 2017

Multiple die layout for facilitating the combining of an individual die into a single die

Inventors: Ka Y. Leung (Austin, TX); Jean-Luc Nauleau (Los Gatos, CA)
Assignee: SILICON LABORATORIES INC.
H01L25/0655H01L23/4952H01L23/49575H01L23/52H01L23/585H01L24/73H01L24/97H01L24/48H01L24/49H01L2224/05554H01L2224/40H01L2224/48106H01L2224/48137H01L2224/48247H01L2224/48257H01L2224/49171H01L2924/00014H01L2924/01033H01L2924/01082H01L2924/10161H01L2924/14H01L2924/19041
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Quick Facts
Patent No.
US 9,793,240
App. No.
14/529,492
Granted
Oct 17, 2017
Kind
B2
Abstract

An apparatus includes a wafer portion and a plurality of die fabricated in the wafer portion in a defined pattern such that the die are separated from each other by a dicing area or a street. The apparatus includes a conductive connection between given adjacent die. The conductive connection is electrically coupled to circuitry disposed on the given adjacent die.

Claims (23)

1. An apparatus comprising:

a wafer portion;

a plurality of die fabricated in the wafer portion in a defined pattern such that the die of the plurality die are separated from each other by a dicing area or a street, the plurality of die comprising a first die adjacent to a second die;

a conductive connection between the first die and the second die, wherein the conductive connection electrically couples circuitry disposed on the first die to circuitry disposed on the second die, wherein the conductive connection is electrically interfaced to a power connection on the first die and a power provided to the first die is applied through the conductive connection to the second die; and

a material to encapsulate the wafer portion.

2. The apparatus of claim 1 , wherein the conductive connection comprises a metal layer.

3. The apparatus of claim 1 , wherein the conductive connection communicates power between the first die, the apparatus further comprising another conductive connection between the first die and the second die and being associated with ground.

4. The apparatus of claim 1 , further comprising another conductive connection to communicate an electrical signal during operation of each of the first and second die, and wherein the electrical signal is associated with a signal other than a power supply or ground.

5. The apparatus of claim 1 , wherein the conductive connection is disposed in a metal layer on the top level of the die.

6. The apparatus of claim 5 , further comprising a passivation layer disposed over the wafer covering at least the die and at least the conductive connection within the street between the first and second die.

7. The apparatus of claim 1 , wherein the plurality of die comprises circuitry, the apparatus further comprising:

an electrical contact exposed outside of the material to form an electrical connection with the circuitry.

8. The apparatus of claim 7 , further comprising a lead frame.

9. An apparatus comprising:

a wafer portion;

a plurality of die fabricated in the wafer portion in a defined pattern such that the die of the plurality die are separated from each other by a dicing area or a street, the plurality of die comprising a first die adjacent to a second die, wherein the first die is identical to the second die;

a conductive connection between the first die and the second die, wherein the conductive connection electrically couples circuitry disposed on the first die to circuitry disposed on the second die; and

a material to encapsulate the wafer portion.

10. An apparatus comprising:

a wafer portion;

a plurality of die fabricated in the wafer portion in a defined pattern such that the die of the plurality die are separated from each other by a dicing area or a street, the plurality of die comprising a first die adjacent to a second die, wherein circuitry disposed on the first die performs a function not performed by circuitry on the second die;

a conductive connection between the first die and the second die, wherein the conductive connection electrically couples circuitry disposed on the first die to circuitry disposed on the second die; and

a material to encapsulate the wafer portion.

Continuity (2)
Division 12571096 · Sep 30, 2009
Related Publication 20150294954A1 · Oct 15, 2015